A modular bare die socket assembly is provided for attaching a plurality of miniature semiconductor dice to a substrate. The socket assembly is comprised of a plurality of two-sided plates joined vertically in a horizontal stack, wherein each plate has a die socket for the removable insertion of a bare semiconductor die. A multi-layer interconnect lead tape has a plurality of lithographically formed leads bent on one end to form nodes for attachment to bond pads on the removably inserted semiconductor die, and having opposing ends connectable to the substrate.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An interconnect socket for connecting bond pads of a semiconductor die to traces of a substrate comprising: a multi-layered interconnect tape having a plurality of leads forming at least one of a portion of a resilient member and abutting a portion of a resilient member; and two attached plates stacked in side-by-side relation forming an insertion slot for a semiconductor die and another tape slot having a portion of the multi-layered interconnect tape therein.
2. The socket of claim 1 , wherein a plate of the two plates comprises a plate adhesively secured to an adjacent plate.
3. The socket of claim 1 , wherein each of the plurality of leads is configured for solderless pressure contact with the bond pads.
4. The socket of claim 1 , further comprising: alignment keys located near first ends of the plates, the alignment keys comprising posts in one of the sides of the two plates and matching apertures in another of the two sides of the two plates.
5. The socket of claim 1 , further comprising: retention/alignment keys near second ends of the two plates, the retention/alignment keys comprising posts in one of the sides of the two plates and matching apertures in the other of the sides of the two plates, the posts passed through matching apertures in the interconnect tape into matching apertures in the two plates.
6. The socket of claim 1 , wherein outer leads of the plurality of leads are configured for joining by solder with the traces on the substrate.
7. The socket of claim 1 , wherein the substrate comprises a circuit board.
8. The socket of claim 1 , wherein the multi-layered interconnect tape comprises a resilient apparatus including an insulative film to which conductive leads are formed, the insulative film to be resiliently displaced by insertion of a semiconductor die into the insertion slot.
9. The socket of claim 1 , further wherein the multi-layered interconnect tape comprises a resilient apparatus including a compressible elastomeric foam backing on an insulative film.
10. The socket of claim 1 , wherein the multi-layered interconnect tape comprises a compressible elastomeric stem between the tape and a plate, the stem compressed by insertion of a semiconductor die into the die slot.
11. The socket of claim 1 , wherein the multi-layered interconnect tape comprises a narrow projection of a plate of the two plates, the narrow projection having a node to which the multi-layered interconnect tape is joined to be forcibly bent by insertion of a semiconductor die into the insertion slot.
12. The socket of claim 1 , wherein the insertion slot is located generally between the two plates at the first ends thereof.
13. The socket of claim 1 , wherein the semiconductor die has two rows of conductive bond pads thereon, and each of the plurality of leads is formed on both surfaces of the multi-layered interconnect tape, the plurality of leads on a first surface of the multi-layered interconnect tape to be connected to one of the rows and the plurality of leads on a second surface of the multi-layered interconnect tape to be connected to the other of the rows.
14. The socket of claim 13 , further comprising a layer of elastomeric material fixed to the multi-layered interconnect tape to abut an opposing wall of a plate of the two plates for maintaining contact of at least one lead of the leads with at least one bond pad of the bond pads.
15. An interconnect socket for connecting a bond pad of a semiconductor die to traces of a substrate comprising: a plurality of multi-layered interconnect lead tapes having each layer having a plurality of leads forming at least one of a portion of a resilient member and abutting a portion of a resilient member; and two plates, each plate of the two plates stacked in side-by-side relation adjacent each other having a bare die insertion slot and a lead tape insertion slot, one multi-layered interconnect lead tape of the plurality of multi-layered interconnect lead tapes having a portion thereof in the lead tape insertion slot between the two plates in the side-by-side relation of the two plates.
16. The socket of claim 15 , wherein a plate of the two plates is adhesively secured to an adjacent plate of the two plates.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
August 15, 2005
March 20, 2007
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