A multi-reference voltage generator includes an interface controller, a first bank of N m-bit registers and a second bank of N m-bit registers. A first multiplexer has inputs connected to outputs of the first and second bank of registers. An m-bit digital-to-analog (DAC) has an m-bit parallel input connected to an output of the first multiplexer. An analog demultiplexer has an input connected to an analog output of the m-bit DAC. Each sample-and-hold circuit in a first group of N sample-and-hold (S/H) circuits is connected to a corresponding output of the analog demultiplexer. Similarly, each S/H circuit in a second group of N S/H circuits is connected to a corresponding output of the analog demultiplexer. N further multiplexers each have a first input connected to an output of a corresponding one of the S/H circuits in the first group and a second input connected to an output of a corresponding one of the S/H circuits in the second group. N output buffers, each have an input connected to an output of a corresponding one of the N further multiplexers, and an output useful for driving a column driver.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for providing multiple reference voltages using a single digital-to-analog converter (DAC), comprising: writing data into a first bank of registers while data in a second bank of registers is converted to analog voltages by the single DAC and stored in a first group of S/H circuits; and writing data into said second bank of registers while data in said first bank of registers is converted to analog voltages by the single DAC and stored in a second group of S/H circuits.
2. The method of claim 1 , further comprising alternating between providing analog voltages stored in said first group of S/H circuits, and providing analog voltages stored in said second group of S/H circuits, to a plurality of output buffers.
3. A method for providing multiple reference voltages using a pair of digital-to-analog converters (DACs), comprising: writing data into a first bank of at least N registers while data stored in a second bank of at least N registers is converted to analog voltages by a first DAC and stored in a first group of S/H circuits, where N is an integer greater than 2; and writing data into said second bank of registers while data stored in said first bank of registers is converted to analog voltages by a second DAC and stored in a second group of S/H circuits.
4. The method of claim 3 , further comprising alternating between providing analog voltages stored in said first group of S/H circuits, and providing analog voltages stored in said second group of S/H circuits, to a plurality of output buffers.
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August 19, 2005
March 20, 2007
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