A method for fabricating a ferroelectric memory having memory cells arranged in arrays, wherein an Al2O3 film (2), a Pt film (3), a PZT film (4) and IrO2 film (5) are formed on an interlayer insulation film. At the time of forming a top electrode, the IrO2 film (5) is patterned using a resist mask having a part extending in the row direction, and then patterned using a resist mask having a part extending in the column direction. Consequently, a top electrode of the IrO2 film (5) having a rectangular plan view is formed at the intersection of these resist masks.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for fabricating a ferroelectric capacitor comprising the steps of: forming a first conductive film, a ferroelectric film, and a second conductive film sequentially on a base film; and patterning the second conductive film, by etching the second conductive film using a plurality of masks different from each other, to be shaped into a rectangular planar shape of a top electrode having a first pair of parallel sides with a first designed length in a first direction and a second pair of parallel sides with a second designed length in a second direction perpendicular to the first direction, wherein a first mask of the different masks, in plan view, has a first masking shape to etch the second conductive film in the first direction along the first pair of parallel sides of the rectangular planar shape and includes a first portion covering a region of the second conductive film to form the top electrode, and a second mask of the different masks, in plan view, has a second masking shape to etch the second conductive film in the second direction along the second pair of parallel sides of the rectangular shape and includes a second portion covering the region of the second conductive film to form the top electrode.
2. The method for fabricating a ferroelectric capacitor according to claim 1 , wherein a first width of the first masking shape is substantially the same as the second designed length in the second direction of the top electrode.
3. The method for fabricating a ferroelectric capacitor according to claim 1 , wherein a second width of the second mask masking shape is substantially the same as the first designed length in the first direction of the top electrode.
4. The method for fabricating a ferroelectric capacitor according to claim 1 , wherein a first width of the first masking shape is narrowed when the second conductive film is etched using the first mask.
5. The method for fabricating a ferroelectric capacitor according to claim 4 , wherein the first width of the first masking shape is larger than the the second designed length in the second direction of the top electrode, and the first width of the first masking shape is narrowed to the second designed length in the second direction of the top electrode when the second conductive film is etched using the first mask.
6. The method for fabricating a ferroelectric capacitor according to claim 1 , wherein a second width of the second masking shape is narrowed when the second conductive film is etched using the second mask.
7. The method for fabricating a ferroelectric capacitor according to claim 6 , wherein the second width of second masking shape is larger than the design size in the first direction of the top electrode, and the second width of the portion extending in the second direction is narrowed to the design size in the first direction of the top electrode when the second conductive film is etched using the second mask.
8. The method for fabricating a ferroelectric capacitor according to claim 1 , wherein said step of patterning the second conductive film includes the steps of: patterning the ferroelectric film to have a planar shape of a capacitor insulation film at least by etching the ferroelectric film using the first mask; and patterning the first conductive film to have a planar shape of the bottom electrode at least by etching the first conductive film using the second mask.
9. The method for fabricating a ferroelectric capacitor according to claim 1 , further comprising the step of forming an alumina film on the base film before said step of forming the first conductive film.
10. The method for fabricating a ferroelectric capacitor according to claim 1 , wherein said step of patterning the second conductive film, the second conductive film is etched using a third mask covering at least a region to form a capacitor insulation film, before performing the etching using the first mask and performing the etching using the second mask.
11. The method for fabricating a ferroelectric capacitor according to claim 10 , wherein a part of the ferroelectric film is also etched when the second conductive film is etched using the first mask.
12. The method for fabricating a ferroelectric capacitor according to claim 11 , wherein a part of the ferroelectric film and a part of the first conductive film are also etched when the second conductive film is etched using the second mask.
13. The method for fabricating a ferroelectric capacitor according to claim 10 , wherein the third mask includes a portion extending in the second direction.
14. The method for fabricating a ferroelectric capacitor according to claim 13 , wherein two pieces of second masks are used for each of regions of the second conductive film remaining after the etching using the third mask.
15. The method for fabricating a ferroelectric capacitor according to claim 11 , wherein a condition on the etching of the second conductive film using the first mask is to complete the patterning of the second conductive film when the overetching of the ferroelectric film is completed.
16. The method for fabricating a ferroelectric capacitor according to claim 12 , wherein a condition on the etching of the second conductive film using the second mask is to complete the patterning of the second conductive film when the overetching of the first conductive film is completed.
17. The method for fabricating a ferroelectric capacitor according to claim 12 , wherein the second mask includes a portion covering a region to form a connecting portion with a plate line of the first conductive film.
18. The method for fabricating a ferroelectric capacitor according to claim 17 , wherein the connecting portion is provided at a position distant from the region remaining after the etching of the second conductive film using the first mask.
19. The method for fabricating a ferroelectric capacitor according to claim 4 , wherein a mixed gas of chlorine and argon is used as an etching gas when the second conductive film is etched using the first mask.
20. The method for fabricating a ferroelectric capacitor according to claim 6 , wherein a mixed gas of chlorine and argon is used as an etching gas when the second conductive film is etched using the second mask.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
March 4, 2005
April 3, 2007
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