Pre-program verify levels for a multilevel read-only memory cell are generated dynamically. A determination takes into account a program verify level, an over-program budget, and a second-bit effect budget to generate pre-program verify levels. The generated pre-program verify levels mitigate issues of over-programming, hard-to-program, and second-bit effect.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of programming a multilevel read-only memory cell, comprising: providing a multilevel read-only memory cell having a plurality of data regions; defining a plurality of memory states for each data region in the multilevel read-only memory cell; associating a program verify level with each memory state; and dynamically generating a pre-program verify level for each memory state, using the associated program verify levels.
2. The method as set forth in claim 1 , further comprising: programming at least one of the plurality of data regions; and verifying the programming, using at least one of the pre-program verify levels.
3. The method as set forth in claim 1 , wherein the dynamic generation of a pre-program verify level comprises: establishing an over-program budget (OB) value corresponding to each memory state; and establishing a second-bit effect budget (SB) value corresponding to each memory state.
4. The method as set forth in claim 3 , wherein the providing of a multilevel read-only memory cell comprises providing a multilevel read-only memory cell having a left data region and a right data region.
5. The method as set forth in claim 4 , further comprising: programming at least one of the left data region and the right data region; and verifying the programming, using at least one of the pre-program verify levels.
6. The method as set forth in claim 4 , further comprising: selecting a left memory state for the left data region; selecting a right memory state for the right data region; determining a left OB value according to the left memory state; determining a right SB value according to the right memory state; and generating a left pre-program verify level according to the left OB value, the right SB value, and the program verity level associated with the left memory state.
7. The method as set forth in claim 6 , further comprising: determining a right OB value according to the right memory state; determining a left SB value according to the left memory state; and generating a right pre-program verify level according to the right OB value, the left SB value, and the program verify level associated with the right memory state.
8. The method as set forth in claim 7 , further comprising: programming at least one of the left data region and the right data region; and verifying the programming, using at least one of the left pre-program verify level and the right pre-program verify level.
9. The method as set forth in claim 7 , wherein the generating of a left pre-program verify level comprises determining a left dynamic adjustment by adding the left OB value and the right SB value.
10. The method as set forth in claim 9 , wherein the generating of a right pre-program verify level comprises determining a right dynamic adjustment by adding the tight OB value and the left SB value.
11. The method as set forth in claim 10 , wherein the generating of a left pre-program verify level comprises subtracting the left dynamic adjustment from the program verify level associated with the left memory state.
12. The method as set forth in claim 11 , wherein the generating of a right pre-program verify level further comprises subtracting the right dynamic adjustment from the program verify level associated with the right memory state.
13. The method as set forth in claim 12 , further comprising: programming at least one of the left data region and the right data region; and verifying the programming, using at least one of the left pre-program verify level and the right pre-program verify level.
14. The method as set forth in claim 10 , wherein the generating of a left pre-program verify level further comprises adding the left dynamic adjustment to the program verify level associated with the left memory state.
15. The method as set forth in claim 14 , wherein the generating of a right pre-program verify level further comprises adding the right dynamic adjustment to the program verify level associated with the right memory state.
16. The method as set forth in claim 15 , further comprising: programming at least one of the left data region and the right data region; and verifying the programming, using at least one of the left pre-program verify level and the right pre-program verify level.
17. The method as set forth in claim 1 , wherein the defining of a plurality off memory states comprises defining two memory states for each data region.
18. The method as set forth in claim 1 , wherein the defining of a plurality of memory states comprises defining three memory states for each data region.
19. The method as set forth in claim 1 , wherein the defining of a plurality of memory states comprises defining at least four memory states for each data region.
20. A method of programming a memory cell having first and second data regions, the method comprising: defining a plurality of program verify levels for each data region; associating a memory state with each program verify level; and generating a pre-program verify level for each memory state in each data region; wherein the generating of a pre-program verify level comprises determining an over-program budget (OB) value for each memory state and determining a second-bit effect budget (SB) value for each memory state.
21. The method as set forth in claim 20 , further comprising: selecting a first memory state for the first data region; selecting a second memory state for the second data region; selecting a first program verify level for the first data region according to the first memory state; and generating a first pre-program verify level for the first data region according to the first program verify level, the OB value for the first memory state, and the SB value for the second memory state.
22. The method as set forth in claim 21 , further comprising: selecting a second program verity level for the second data region according to the second memory state; and generating a second pre-program verify level for the second data region according to the second program verify level, the OB value for the second memory state, and the SB value for the first memory state.
23. The method as set forth in claim 22 , further comprising: programming at least one of the first data region and the second data region; and verifying the programming, using at least one of the first pre-program verify level and the second pre-program verify level.
24. The method as set forth in claim 22 , wherein the generating of a first pre-program verify level for the first data region comprises: forming a first sum by adding the OB value for the first memory state to the SB value for the second memory state; and adding the first program verify level to the first sum.
25. The method as set forth in claim 24 , wherein the generating of a second pre-program verify level comprises: forming a second sum by adding the OB value for the second memory state to the SB value for the first memory state; and adding the second program verify level to the second sum.
26. The method as set forth in claim 25 , further comprising: programming at least one of the first data region and the second data region; and verifying the programming, using at least one of the first pre-program verify level and the second pre-program verify level.
27. The method as set forth in claim 22 , wherein the generating of a first pre-program verify level for the first data region comprises: forming a first sum by adding the OB value for the first memory state to the SB value for the second memory state; and subtracting the first sum from the first program verify level.
28. The method as set forth in claim 27 , wherein the generating of a second pre-program verify level comprises: forming a second sum by adding the OB value for the second memory state to the SB value for the first memory state; and subtracting the second sum from the second program verify level.
29. The method as set forth in claim 28 , further comprising: programming at least one of the first data region and the second data region; and verifying the programming, using at least one of the first pre-program verify level and the second pre-program verify level.
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January 25, 2005
April 17, 2007
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