A multichip package has a leadframe including peripheral leads arranged about a centrally situated die paddle. A first (“upper”) die is attached to a first (“top”) side of the leadframe die paddle, which can be generally flat. The second (“bottom”) side of the leadframe is partially-cut away (such as by partial etching), so that an outer part of the die paddle is thinner, and so that an inner part of the leads is thinner. These partially cutaway portions in the second (“bottom”) side of the leadframe provide a cavity, in which a second (“lower”) die is attached active side upward. The lower die may have bond pads situated near the center of the active surface, and electrical interconnection of the lower die may be made by wire bonds running through the gap between the die paddle and the leads; or, the lower die may be attached, and electrically interconnected, by flip chip interconnect to the die attach side of the cavity in the leadframe. Also, multipackage modules include at least one such multichip leadframe package.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A leadframe, having a first side and a second side, the leadframe comprising a die paddle and leads, each lead comprising an outer land portion and an inner bond finger portion, the die paddle having a margin and an edge, there being a gap between the die paddle edge and inner ends of the bond finger portions of the leads, a surface of the first side of the die paddle including a first side die attach region, and further comprising at least one cavity in the second side of the leadframe, each cavity having a depth and at least one die mount surface spanning the gap, the die mount surface being dimensioned to accommodate the footprint of a selected second side die, and the depth being dimensioned at least as great as the thickness of the selected second side die plus the thickness of selected second side die mounting means.
2. The leadframe of claim 1 , comprising at least two said cavities in the second side of the leadframe.
3. The leadframe of claim 1 , comprising four said cavities in the second side of the leadframe.
4. The leadframe of claim 1 , comprising at least two said die mount surfaces spanning the gap.
5. The leadframe of claim 1 , comprising four said die mount surfaces spanning the gap.
6. A leadframe, having a first side and a second side, the leadframe comprising a die paddle and leads, each lead comprising an outer land portion and an inner bond finger portion, the die paddle having a margin and an edge, there being a gap between the die paddle edge and inner ends of the bond finger portions of the leads, a surface of the first side of the die paddle including a first side die attach region, and further comprising at least one cavity in the second side of the leadframe, each cavity spanning the gap and comprising a step in a portion of the second side of the die paddle margin and a step in a portion of the second side of the bond finger portion of at least one lead, the steps comprising a die mount surface of the cavity comprising a die attach surface being dimensioned to accommodate the footprint of a selected second side die, and the depth being dimensioned at least as great as the thickness of the selected second side die plus the thickness of selected second side die mounting means.
7. A leadframe, having a first side and a second side, the leadframe comprising a die paddle and leads, each lead comprising an outer land portion and an inner bond finger portion, the die paddle having a margin and an edge, there being a gap between the die paddle edge and inner ends of the bond finger portions of the leads, a surface of the first side of the die paddle including a first side die attach region, and further comprising a step in a portion of the second side of the die paddle margin and a step in a portion of the second side of the bond finger portion of at least one lead, the steps in the second side of at least a portion of the die paddle margin together with a step in the second side of at least a portion of bond finger portion of at least one lead form a cavity spanning the gap, the steps having generally coplanar second die attach surfaces in a plane generally parallel to a surface of the second side of the leadframe, the cavity being dimensioned to accommodate the footprint of a second die, the cavity having a depth at least as great as the thickness of the second die plus the thickness of second die attach means.
8. A multichip leadframe semiconductor package, comprising the leadframe of claim 1 , a first die affixed to said first side die attach region, and a second die affixed to a die mount surface of a said cavity.
9. The package of claim 8 wherein the first die is oriented such that the active surface of the first die faces away from the first side die attach region.
10. The package of claim 9 wherein the first die is electrically interconnected to the lead frame by wire bonds.
11. The package of claim 8 wherein the second die is oriented such that the active surface of the second die faces the die mount surface of the cavity.
12. The package of claim 11 wherein the second die is electrically interconnected to the lead frame by wire bonds.
13. The package of claim 11 wherein the second die is positioned such that the die pads underlie the gap, and the wire bonds pass through the gap.
14. The package of claim 11 wherein the second die is electrically interconnected to the lead frame by flip chip interconnection.
15. The package of claim 8 , further comprising an additional die stacked over the first die.
16. The package of claim 8 , further comprising an encapsulant covering the die and the interconnections.
17. The package of claim 16 , wherein a surface of the second side of the leadframe is left uncovered by the encapsulant.
18. The package of claim 16 , wherein a surface of lands on the second side of the die paddle is left uncovered by the encapsulant.
19. A multi-package module comprising at least a first multichip leadframe semiconductor package according to claim 8 , stacked with at least one second package, the packages having electrical interconnections between second-level interconnect sites on the first multichip leadframe semiconductor package and second-level interconnect sites on the second package.
20. The multi-package module of claim 19 wherein the electrical interconnections comprise wire bonds.
21. The multi-package module of claim 19 wherein the electrical interconnections comprise solder balls.
22. The multi-package module of claim 19 wherein the at least one second package is a second multichip leadframe semiconductor package according to claim 8 .
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 17, 2005
April 24, 2007
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