In accordance with the present invention, there is provided a method for manufacturing a semiconductor package. The method comprises the initial step of applying first and second photoresist layers to respective ones of opposed first and second surfaces of a metal plate which includes a die paddle and a plurality of leads extending at least partially about the die paddle in spaced relation thereto. The first and second photoresist layers are then patterned to expose the die paddle and prescribed portions of each of the leads. Thereafter, first and second conductive layers are applied to portions of respective ones of the first and second surfaces which are not covered by the first and second photoresist layers. The first and second photoresist layers are then removed to facilitate the creation of an exposed area in each of leads which is not covered by the first and second conductive layers. Next, a semiconductor die is attached to a portion of the first conductive layer covering the die paddle and electrically connected to portions of the first conductive layer covering the leads. The semiconductor die, the die paddle, the leads and the first and second conductive layers are then encapsulated with a package body such that portions of the second conductive layer covering the die paddle and the leads, and the exposed area of each of the leads are exposed in a common surface of the package body. Finally, the exposed area of each of the leads is etched to facilitate the division of the leads into an inner set extending at least partially about the die paddle and an outer set extending at least partially about the inner set.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for manufacturing a semiconductor package, comprising the steps of: a) applying first and second photoresist layers to respective ones of opposed first and second surfaces of a metal plate which includes a die paddle and a plurality of leads extending at least partially about the die paddle in spaced relation thereto; b) patterning the first and second photoresist layers to expose the die paddle and prescribed portions of each of the leads; c) applying first and second conductive layers to portions of respective ones of the first and second surfaces which are not covered by the first and second photoresist layers; d) removing the first and second photoresist layers to facilitate the creation of an exposed area in each of leads which is not covered by the first and second conductive layers; e) attaching a semiconductor die to a portion of the first conductive layer covering the die paddle; f) electrically connecting the semiconductor die to portions of the first conductive layer covering the leads; g) at least partially encapsulating the semiconductor die, the die paddle, the leads and the first and second conductive layers with a package body such that portions of the second conductive layer covering the die paddle and the leads, and the exposed area of each of the leads are exposed in a common surface of the package body; and h) etching the exposed area of each of the leads to facilitate the division of the leads into an inner set extending at least partially about the die paddle and an outer set extending at least partially about the inner set.
2. The method of claim 1 wherein step (f) comprises electrically connecting the semiconductor die to portions of the first conductive layer covering the leads through the use of conductive wires which are encapsulated by the package body in step (g).
3. The method of claim 1 further comprising the step of: i) singulating the package body such that an outer end of each of the leads of the outer set is exposed in a side surface of the package body.
4. The method of claim 3 wherein step (i) is completed by a punching process.
5. The method of claim 1 wherein step (a) comprises applying the first and second photoresist layers to respective ones of the opposed first and second surfaces of a copper plate.
6. A method for manufacturing a semiconductor package, comprising the steps of: a) applying a conductive layer to a metal plate; b) applying a photoresist layer to the conductive layer; c) patterning the photoresist layer to expose a prescribed area of the conductive layer; d) etching the exposed area of the conductive layer to facilitate the division of the conductive layer into a die paddle, an inner set of leads which extends at least partially about the die paddle, and an outer set of leads which extends at least partially about the inner set; e) removing the photoresist layer from the die paddle and from the leads of the inner and outer sets thereof formed in step (d); f) attaching a semiconductor die to the die paddle; g) electrically connecting the semiconductor die to at least some of the leads of each of the inner and outer sets thereof; h) at least partially encapsulating the semiconductor die, the die paddle, the leads of the inner and outer sets, and the metal plate with a package body; and i) removing the metal plate from the package body such that such that the die paddle and the leads of the inner and outer sets are exposed in a common surface of the package body.
7. The method of claim 6 wherein step (g) comprises electrically connecting the semiconductor die to at least some of the leads of the inner and outer sets through the use of conductive wires which are encapsulated by the package body in step (h).
8. The method of claim 6 further comprising the step of: j) singulating the package body such that an outer end of each of the leads of the outer set is exposed in a side surface of the package body.
9. The method of claim 8 wherein step (j) is completed by a punching process.
10. The method of claim 6 wherein step (a) comprises applying the conductive layer to a copper plate.
11. The method of claim 6 wherein step (d) comprises etching the exposed area of the conductive layer to facilitate the division thereof into a quadrangular die paddle defining four peripheral edge segments, an inner set of leads which extends along each of the peripheral edge segments of the die paddle, and an outer set of leads which circumvents the inner set.
12. The method of claim 6 wherein step (d) comprises etching the exposed area of the conductive layer to facilitate the division thereof into a die paddle, an inner set of leads which extends at least partially about the die paddle, a middle set of leads which extends at least partially about the inner set, and an outer set of leads which extends at least partially about the middle set.
13. The method of claim 12 wherein step (d) comprises etching the exposed area of the conductive layer to facilitate the division thereof into a quadrangular die paddle defining four peripheral edge segments, an inner set of leads which extends along each of the peripheral edge segments of the die paddle, a middle set of leads which circumvents the inner set, and an outer set of leads which circumvents the middle set.
14. A method for manufacturing a semiconductor package, comprising the steps of: a) applying a photoresist layer to a metal plate; b) patterning the photoresist layer to expose prescribed areas of the conductive layer; c) applying a conductive layer to the exposed areas of the metal plate to facilitate the formation of a die paddle, an inner set of leads which extends at least partially about the die paddle, and an outer set of leads which extends at least partially about the inner set; d) attaching a semiconductor die to the die paddle; e) electrically connecting the semiconductor die to at least some of the leads of each of the inner and outer sets thereof; f) at least partially encapsulating the semiconductor die, the die paddle, the leads of the inner and outer sets, and the photoresist layer with a package body; and g) removing the metal plate from the package body such that such that the die paddle and the leads of the inner and outer sets are exposed in a common surface of the package body.
15. The method of claim 14 wherein step (e) comprises electrically connecting the semiconductor die to at least some of the leads of the inner and outer sets through the use of conductive wires which are encapsulated by the package body in step (f).
16. The method of claim 14 further comprising the step of: h) singulating the package body such that an outer end of each of the leads of the outer set is exposed in a side surface of the package body.
17. The method of claim 14 wherein step (a) comprises applying the photoresist layer to a copper plate.
18. The method of claim 14 wherein step (c) comprises applying the conductive layer to the exposed area of the metal plate to facilitate the formation of a quadrangular die paddle defining four peripheral edge segments, an inner set of leads which extends along each of the peripheral edge segments of the die paddle, and an outer set of leads which circumvents the inner set.
19. A method for manufacturing a semiconductor package, comprising the steps of: a) applying a conductive layer to a metal plate; b) applying a photoresist layer to the conductive layer; c) patterning the photoresist layer to expose a prescribed area of the conductive layer; d) etching the exposed area of the conductive layer to facilitate the division of the layer into a plurality of leads; e) removing the photoresist layer from the leads formed in step (d); f) electrically attaching a semiconductor die to the leads; g) at least partially encapsulating the semiconductor die, the leads, and the metal plate with a package body; and h) removing the metal plate from the package body such that such that the leads are exposed in a common surface of the package body.
20. The method of claim 19 wherein step (a) comprises applying the conductive layer to a copper plate.
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January 19, 2005
May 8, 2007
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