A technique for forming die stacks. Specifically, a stacking tip is provided to facilitate the stacking of die in a desired configuration. A first die is picked up by the stacking tip. The first die is coated with an adhesive on the underside of the die. The first die is brought in contact with a second die via the stacking tip. The second die is coupled to the first die via the adhesive on the underside of the first die. The second die is coated with an adhesive coating on the underside of the die. The second die is then brought in contact with a third die via the stacking tip. The third die is coupled to the second die via the adhesive on the underside of the second die, and so forth. Die stacks are formed without being coupled to a substrate. The die stacks may be functionally and/or environmentally tested before attaching the die stack to a substrate.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of stacking semiconductor die comprising the acts of: forming a stack of at least two semiconductor die, comprising: applying adhesive to an underside of a first die having a topside and the underside, thereby providing an adhesively coated underside of the first; after applying the adhesive, picking up the first die with a die picking tool; and without releasing the first die from the die picking tool picking up a second die having a topside and an underside by placing the adhesively coated underside of the first die against the topside of the second die, thereby forming a die stack; and placing the stack onto a temporary holding surface.
2. The method, as set forth in claim 1 , wherein the first die is thicker than the second die.
3. The method, as set forth in claim 1 , comprising the act of applying adhesive to the underside of the second die, thereby providing an adhesively coated underside of the second die.
4. The method, as set forth in claim 3 , comprising the act of without releasing the first die from the picking tool, picking up a third die having a topside and an underside by placing the adhesively coated underside of the second die against the topside of the third die.
5. The method, as set forth in claim 1 , wherein the act of forming comprises the act of forming a stack of at least three semiconductor die.
6. The method, as set forth in claim 1 , wherein the act of placing comprises the act of placing the stack onto a film frame.
7. The method, as set forth in claim 1 , wherein the act of placing comprises the act of placing the stack onto a gel pack.
8. The method, as set forth in claim 1 , wherein the act of placing comprises the act of placing the stack onto a wafer.
9. The method, as set forth in claim 1 , wherein the act of placing comprises the act of placing the stack onto a tape reel.
10. The method, as set forth in claim 1 , comprising the act of attaching the die stack to a substrate.
11. The method, as set forth in claim 10 , comprising the acts of: applying a first adhesive between each of the at least two semiconductor die, the first adhesive being curable at a first temperature; and applying a second adhesive between the die stack and the substrate, the second adhesive being curable at a second temperature lower than the first temperature.
12. The method, as set forth in claim 1 , wherein the act of forming comprises forming a shingle stack.
13. The method, as set forth in claim 1 , comprising the act of removing the stack from the temporary holding surface and using the stack to form an integrated circuit package.
14. The method, as set forth in claim 13 , comprising the act of electrically coupling the integrated circuit package to a processor to form an electronic system.
15. The method, as set forth in claim 1 , wherein at least one of the at least two semiconductor die comprises a memory die.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 3, 2004
May 15, 2007
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