A semiconductor device includes a wiring board having a wiring pattern, a semiconductor chip that has an integrated circuit and is mounted on a first surface of the wiring board to electrically connect with the wiring pattern, a spacer that is disposed on a second surface of the wiring board and has inside thereof an electronic component that is electrically connected with the wiring pattern and an external terminal that is disposed on the second surface and electrically connected with the wiring pattern.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor device, comprising: a wiring board having a wiring pattern; a semiconductor chip that has an integrated circuit and is mounted on a first surface of the wiring board to electrically connect with the wiring pattern; an electronic component mounted to a second surface of the wiring board and electrically connected with the wiring pattern; a resin spacer formed on the second surface of the wiring board to overlie and seal the electronic component, wherein the spacer is formed with a recess on a surface opposite to a surface that faces the wiring board; and an external terminal that is disposed on the second surface and electrically connected with the wiring pattern, wherein the external terminal has a height higher than that of the spacer.
2. A circuit board on which the semiconductor device according to claim 1 is mounted.
3. An electronic device comprising said semiconductor device according to claim 1 .
4. A semiconductor device comprising: a wiring board having a wiring pattern; a semiconductor chip that has an integrated circuit and is mounted on a first surface of the wiring board to electrically connect with the wiring pattern; a spacer that is disposed on a second surface of the wiring board and has inside thereof an electronic component that is electrically connected with the wiring pattern; and an external terminal that is disposed on the second surface and electrically connected with the wiring pattern, wherein the external terminal has a height higher than that of the spacer, and wherein on a surface that is opposite to a surface that faces the wiring board in the spacer a recess is formed.
5. The semiconductor device according to claim 4 , wherein the recess is disposed avoiding a region that overlaps with the electronic component.
6. A method of manufacturing a semiconductor device comprising: preparing a wiring board having a first surface of which a semiconductor chip is mounted and having a second surface of which an electronic component is mounted; forming on the second surface a spacer that seals the electronic component, wherein the spacer is formed so as to have a recess on a surface opposite to a surface that faces the wiring board; and disposing an external terminal on the second surface that has a height higher than that of the spacer.
7. The method of manufacturing a semiconductor device according to claim 6 , wherein the spacer is formed so as to be disposed avoiding a region where the recess overlaps with the electronic component.
8. A semiconductor device comprising: a wiring board having a wiring pattern; a semiconductor chip that has an integrated circuit and is mounted on a first surface of the wiring board to electrically connect with the wiring pattern; means for housing an electronic component that is electrically connected with the wiring pattern disposed on a second surface of the wiring board; and an external terminal that is disposed on the second surface and electrically connected with the wiring pattern, wherein the external terminal has a height higher than that of the spacer, and wherein on a surface that is opposite to a surface that faces the wiring board in the means for housing a recess is formed.
9. The semiconductor device according to claim 8 , wherein the recess is disposed avoiding a region that overlaps with the electronic component.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 19, 2004
June 26, 2007
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