A semiconductor die and a related method of processing a semiconductor wafer are disclosed in which a first interlayer insulator having a recess region of varying configuration and defining a scribe line is associated with at least one protective layer formed with a characterizing inclined side surface.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor die, comprising: a first interlayer insulator having a principal surface and a recess region containing a scribe line; a second interlayer insulator formed on the first insulator layer; a principal conductive line characterized by an inclined side surface and formed on the first and second interlayer insulators, wherein the inclined side surface defines an angle of inclination with respect to the principal surface of the first interlayer insulator ranging from about 40° to about 80°; and a protective layer formed on the inclined side surface of the principal conductive line and on at least one surface of the recess region.
2. The semiconductor die of claim 1 , wherein the scribe line remains uncovered by the protective layer within the recess region.
3. The semiconductor die of claim 1 , wherein the recess region has a width defining the scribe line.
4. The semiconductor die of claim 1 , wherein the principal conductive line is electrically connected to a subordinated conductive line formed on the principal surface of the first interlayer insulator.
5. The semiconductor die of claim 4 , wherein the subordinated conductive line comprises a first portion covered by the second interlayer insulator and an exposed portion.
6. The semiconductor die of claim 1 , wherein a bottom surface of the protective layer strongly adheres to at feast one surface of the recess region.
7. The semiconductor die of claim 6 , wherein the protective layer covers upper and side surfaces of the second interlayer insulator.
8. A semiconductor die, comprising: a first interlayer insulator having a principal surface and a recess region containing a scribe line; a second interlayer insulator formed on the first insulator layer; a principal conductive line characterized by an inclined side surface and formed on the first and second interlayer insulators, wherein the inclined side surface is defined in relation to the height of the principal conductive layer; and a protective layer formed on the inclined side surface of the principal conductive line and on at least one surface of the recess region.
9. The semiconductor die of claim 8 , wherein the height of the principal conductive layer is defined in relation to a height associated with the second interlayer insulator and a height associated with a sidewall surface of the recess region.
10. The semiconductor die of claim 8 , wherein the inclined side surface of the principal conductive layer is further defined in relation to the width of the exposed portion of the principal conductive layer.
11. A semiconductor die, comprising: a first interlayer insulator having a principal surface and a recess region defining a scribe line; a first conductive line formed on the principal surface of the first interlayer insulator; a second interlayer insulator formed on the first interlayer insulator and partially covering the first conductive line to define an exposed side surface and an exposed upper surface portion of the first conductive line; a second conductive line characterized by an inclined side surface and formed on the exposed side surface and exposed upper surface portion of the first conductive line; a first protective layer formed on the inclined side surface of the second conductive line; and a second protective layer formed on the first protective layer and on at least one surface of the first recess region, whereby a bottom surface of the second protective layer strongly adheres to the at least one surface of the recess region.
12. The semiconductor die of claim 11 , wherein the first interlayer insulator comprises a silicon oxide layer.
13. The semiconductor die of claim 11 , wherein the first conductive line comprises one selected from a group consisting of metals Al, Cu, W, and Mo, metal alloys comprising Al, Cu, W, and Mo, and conductive metal nitrides.
14. The semiconductor die of claim 11 , wherein the second conductive line is electrically connected to the first conductive line.
15. The semiconductor die of claim 11 , wherein the inclined side surface of the second conductive line is characterized by a width and height of the second conductive line.
16. The semiconductor die of claim 15 , wherein the width of the second conductive line is defined in relation to a horizontal distance between the side surface of the second interlayer insulator and the exposed side surface of the first conductive line.
17. The semiconductor die of claim 11 , wherein the height of the second conducting line subsumes at least a height of the exposed side surface of the first conducting line and a height of the side surface of the second interlayer insulator.
18. The semiconductor die of claim 11 , wherein a width of the exposed upper surface portion of the first conducting line defines, at least in part, the width of the second conductive line.
19. The semiconductor die of claim 11 , wherein the first interlayer insulator comprises a recessed portion formed near the exposed side surface of the first conductive line; and, wherein the second conductive line is formed on the recessed portion of the first interlayer insulator, the exposed side surface of the first conductive line, and the exposed upper portion of the first conductive line.
20. The semiconductor die of claim 19 , wherein a bottom surface of the second conductive line strongly adheres to the recessed portion of the first interlayer insulator.
21. The semiconductor die of claim 11 , wherein the first protective layer comprises at least one of a silicon oxide layer and a silicon nitride layer.
22. The semiconductor die of claim 21 , wherein the silicon oxide layer comprises a high density plasma (HDP) oxide layer.
23. The semiconductor die of claim 11 , wherein the second protective layer comprises a thermosetting polymer resin or a photosensitive polyimide resin.
24. The semiconductor die of claim 11 , wherein the inclined side surface comprises an arched incline.
25. The semiconductor die of claim 11 , wherein the second protective layer is formed with a thickness ranging from about 2 μm to about 20 μm.
26. A semiconductor die, comprising: a first interlayer insulator having a principal surface, a first recess region and a second recess region, wherein the first recess region defines a scribe line, and wherein the second recess region is formed with a width greater than a width associated with the first recess region and a depth less than a depth associated with the first recess region; a first conductive line formed on the principal surface of the first interlayer insulator; a second interlayer insulator formed on the first interlayer insulator and partially covering the first conductive line to define an exposed side surface and an exposed upper surface portion of the first conductive line; a second conductive line characterized by an inclined side surface and formed on the exposed side surface and exposed upper surface portion of the first conductive line first; a first protective layer formed on the inclined side surface of the second conductive line; and a second protective layer formed on the first protective layer and on at least one surface of the first recess region and on side and bottom surfaces of the second recess region.
27. The semiconductor die of claim 26 , wherein the height of the second conducting line subsumes at least a height of the exposed side surface of the first conducting line, a height of the side surface of the second interlayer insulator, and a height of the side surface of the second recess region.
28. The semiconductor die of claim 26 , wherein the width of the second conductive line is defined by a horizontal distance between a side surface of the second interlayer insulator and the exposed side surface of the second conductive line.
29. The semiconductor die of claim 28 , wherein a width of the exposed upper surface portion of the first conducting line is equal to the horizontal distance.
30. The semiconductor die of claim 26 , wherein the second protective layer comprises a thermosetting polymer resin or a photosensitive polyimide resin.
31. The semiconductor wafer of claim 26 , wherein the first protective comprises a silicon nitride layer formed on a silicon dioxide layer.
32. A semiconductor die, comprising: a first interlayer insulator comprising a principal surface, a recessed lateral surface, and a plurality of recess regions formed in the lateral surface, wherein the later surface defines a scribe line; a first conductive line formed on the principal surface of the first interlayer insulator; a second interlayer insulator formed on the first interlayer insulator and partially covering the first conductive line to define an exposed side surface and an exposed upper surface portion of the first conductive line; a second conductive line characterized by an inclined side surface and formed on the exposed side surface and exposed upper surface portion of the first conductive line first; a first protective layer formed on the inclined side surface of the second conductive line; and a second protective layer formed on the first protective layer and filling at least one of the plurality of recess regions.
33. The semiconductor die of claim 32 , wherein the height of the second conducting line subsumes at least a height of the filled one of the plurality of recess regions, a height of the exposed side surface of the first conducting line, and a height of the side surface of the second interlayer insulator.
34. The semiconductor die of claim 32 , wherein the width of the second conductive line extends from a side surface of the second interlayer insulator to the exposed side surface of the second conductive line.
35. The semiconductor die of claim 32 , wherein the width of the second conductive line is greater than a width of the exposed upper surface portion of the first conductive line.
36. The semiconductor die of claim 32 , wherein the second protective layer comprises a thermosetting polymer resin or a photosensitive polyimide resin.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
September 27, 2005
October 9, 2007
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