Patentable/Patents/US-7310739
US-7310739

Universal serial bus and method for transmitting serial clock and serial data signals during power-saving mode

PublishedDecember 18, 2007
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A universal serial bus (USB) with a power-saving mode and an operating method thereof are provided. When the USB peripheral is coupled to the USB host, the USB host core logic of the USB host transmits an inquiry request via a USB transceiver to inquire whether or not the USB peripheral supports the power-saving mode. The core logic of the USB peripheral responds via the USB transceiver that the power-saving mode is supported. Then the USB peripheral is off-line and then is shifted to be on-line for operating the power-saving mode. The USB host is also switched to the power-saving mode. Under the power-saving mode, the data are respectively transceived by the serial transceivers. The clock frequency of the serial transceiver can be adjusted according to the request of data transmission.

Patent Claims
8 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A universal serial bus with a power-saving mode, comprising: a universal serial bus driving transceiver, comprising a first differential data signal terminal and a second differential data signal terminal; a serial transceiving port, comprising a serial clock signal terminal and a serial data signal terminal, which are coupled to the first differential data signal terminal and the second differential data signal terminal, respectively; and a universal serial bus core logic, coupled to the universal serial bus driving transceiver and the serial transceiving port, wherein when under a normal operational mode, the first and the second differential data signal terminals are driven for transceiving differential data signals; when under a power-saving mode, the serial clock signal terminal and the serial data signal terminal are driven for transceiving a serial clock signal and a serial data signal.

2

2. The universal serial bus with the power-saving mode of claim 1 , wherein the universal serial bus core logic is a universal serial bus host core logic.

3

3. The universal serial bus with the power-saving mode of claim 2 , wherein when the universal serial bus host core logic has detected a connection of a universal serial bus peripheral, the universal serial bus host core logic transmits an inquiry command for inquiring whether or not the universal serial bus peripheral supports the power-saving mode, and if the universal serial bus peripheral supports the power-saving mode, the power-saving mode is activated.

4

4. The universal serial bus with the power-saving mode of claim 2 , wherein when under the power-saving mode, the universal serial bus host core logic adjusts a frequency of the serial clock signal according to a request of data transmission.

5

5. The universal serial bus with the power-saving mode of claim 2 , wherein if there is no request of data transmission, the universal serial bus host core logic stops transmitting the serial clock signal.

6

6. The universal serial bus with the power-saving mode of claim 1 , wherein the universal serial bus core logic is a universal serial bus peripheral core logic.

7

7. The universal serial bus with the power-saving mode of claim 6 , wherein when receiving an inquiry command from a universal serial bus host, the universal serial bus peripheral core logic responds that the universal serial bus peripheral supports the power-saving mode, and is off-line and then reconnected again for operating the power-saving mode.

8

8. An operating method for a universal serial bus, adapted to combine a universal serial bus peripheral with a power-saving mode and a universal serial bus host with a power-saving mode to operate in a power-saving mode, the method comprising: transmitting an inquiry command from the universal serial bus host for inquiring whether or not the universal serial bus peripheral supports the power-saving mode; responding the inquiry command by the universal serial bus peripheral that the power-saving mode is supported, the universal serial bus peripheral being off-line and then reconnected for operating the power-saving mode; and switching the universal serial bus host to the power-saving mode; wherein under the power-saving mode, the universal serial bus host and the universal serial bus peripheral communicate by a serial clock signal and a serial data signal, wherein the serial clock signal is provided by the universal serial bus host, and the universal serial bus host core logic adjusts a frequency of a serial clock signal according to a request of data transmission and the universal serial bus host core logic stops transmitting the serial clock signal if it is indeed that there is no request of data transmission.

Classification Codes (CPC)

Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.

Patent Metadata

Filing Date

October 28, 2004

Publication Date

December 18, 2007

Want to explore more patents?

Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.

Citation & reuse

Analysis on this page is generated by Patentable — an AI-powered patent intelligence platform. AI-generated summaries, explanations, and analysis may be reused with attribution and a visible link back to the canonical URL below. Patent abstracts and claims are USPTO public domain.

Cite as: Patentable. “Universal serial bus and method for transmitting serial clock and serial data signals during power-saving mode” (US-7310739). https://patentable.app/patents/US-7310739

© 2026 Patentable. All rights reserved.

Patentable is a research and drafting-assistant tool, not a law firm, and does not provide legal advice. Documents we generate are drafts for review by a licensed patent attorney.