An integrated circuit device incorporating a metallurgical bond to enhance thermal conduction to a heat sink. In a semiconductor device, a surface of an integrated circuit die is metallurgically bonded to a surface of a heat sink. In an exemplary method of manufacturing the device, the upper surface of a package substrate includes an inner region and a peripheral region. The integrated circuit die is positioned over the substrate surface and a first surface of the integrated circuit die is placed in contact with the package substrate. A metallic layer is formed on a second opposing surface of the integrated circuit die. A preform is positioned on the metallic layer and a heat sink is positioned over the preform. A joint layer is formed with the preform, metallurgically bonding the heat sink to the second surface of the integrated circuit die.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A flip chip integrated circuit device comprising: a package substrate having an upper and a lower surface wherein the upper surface has an inner region of interconnect for receiving the integrated circuit device and a peripheral region; a stiffener ring with upper and lower surfaces wherein the lower surface is attached to the peripheral region of the package substrate upper surface; an integrated circuit die having first and second opposing sides, the first side including a plurality of solder bumps in electrical contact with the inner region interconnect; a heat sink; and a joint layer metallurgically bonded to a first side of the heat sink and the second surface of the die, the joint layer formed by a first metallurgical stack: a titanium adhesion layer formed on the second surface of the die; a barrier layer formed on the titanium adhesion layer, wherein the barrier layer is platinum, nickel, palladium, copper, chromium, or alloys thereof; and a gold-containing layer formed on the barrier layer.
2. The device of claim 1 further including a second joint layer metalurgically bonded to the upper surface of the stiffener ring and the heat sink.
3. The device of claim 1 further consisting of a metallic preform heat bonded to the first metallurgical stack.
4. The device of claim 1 wherein the gold-containing layer comprises an alloy of gold and at least one element from the group consisting of silicon, tin and germanium.
5. The device of claim 1 wherein the gold-containing layer comprises an alloy of gold and tin twenty percent by weight.
6. The device of claim 1 wherein the gold-containing layer comprises an alloy of gold and one to six percent silicon by weight.
7. The flip chip integrated circuit device of claim 1 wherein the gold-containing layer comprises a gold germanium alloy having twelve percent or less germanium by weight.
8. The device of claim 1 wherein the joint layer is formed by a deposited first metallurgical stack on the second surface of the die, wherein the metallic preform is positioned against the first metallurgical stack, and the heat sink is positioned against the preform, and wherein a second metallurgical stack is located on the heat sink and in contact with the preform.
9. The device of claim 1 wherein the thickness of the joint layer ranges from 12.7 to 50.8 μm.
10. The device of claim 8 wherein in the second metallurgical stack comprises: a titanium adhesion layer located on the heat sink; a barrier layer located on the titanium adhesion layer, wherein the barrier layer is nickel, platinum, palladium, or other noble transition metal; and a gold alloy layer located on the barrier layer.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
September 27, 2005
February 5, 2008
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