An improved solution for producing nitride-based heterostructure(s), heterostructure device(s), integrated circuit(s) and/or Micro-Electro-Mechanical System(s) is provided. A nitride-based etch stop layer that includes Indium (In) is included in a heterostructure. An adjacent layer of the heterostructure is selectively etched to expose at least a portion of the etch stop layer. The etch stop layer also can be selectively etched. In one embodiment, the adjacent layer can be etched using reactive ion etching (RIE) and the etch stop layer is selectively etched using a wet chemical etch. In any event, the selectively etched area can be used to generate a contact or the like for a device.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of producing a nitride-based heterostructure, the method comprising: obtaining a partial nitride-based heterostructure; applying a nitride-based etch stop layer including indium (In) above the partial nitride-based heterostructure; applying a nitride-based cap layer including aluminum (Al) directly on the etch stop layer; selectively etching the cap layer to expose at least a portion of a top surface of the etch stop layer, wherein the selectively etching stops when the at least a portion of the top surface of the etch stop layer is exposed; and selectively etching the etch stop layer using a different etching process than the selectively etching the cap layer.
2. The method of claim 1 , wherein the cap layer further includes at least one of: gallium (Ga), or indium (In).
3. The method of claim 1 , wherein the partial nitride-based heterostructure comprises an AlN/GaN/InN based heterostructure.
4. The method of claim 1 , wherein the etch stop layer comprises a thin InGaN epilayer.
5. The method of claim 1 , wherein the selectively etching uses reactive ion etching (RIE).
6. The method of claim 1 , further comprising applying a passivation layer above the cap layer.
7. The method of claim 1 , wherein the selectively etching the etch stop layer uses chemical etching.
8. The method of claim 1 , wherein the obtaining includes: obtaining a substrate; applying a buffer layer above the substrate; applying a first layer above the buffer layer; and applying a second layer above the first layer.
9. The method of claim 8 , wherein the second layer has a molar fraction of Al that is different than a molar fraction of Al for the first layer.
10. The method of claim 8 , wherein the obtaining further includes: applying a second etch stop layer including In on at least one of: the substrate, the buffer layer, or the first layer; and selectively etching at least one of: the substrate, the buffer layer, the first layer, or the second layer such that at least a portion of the second etch stop layer is exposed.
11. The method of claim 1 , further comprising applying a dielectric layer above at least one of: the partial nitride-based heterostructure, the etch stop layer or the cap layer.
12. A method of producing a nitride-based heterostructure, the method comprising: obtaining a nitride-based heterostructure, the nitride-based heterostructure including an etch stop layer that includes indium (In) and an adjacent layer to the etch stop layer, the adjacent layer having substantially no indium (In) and including aluminum (Al); selectively etching the adjacent layer to expose at least a portion of a bottom or a top surface of the etch stop layer, wherein the selectively etching stops when the at least a portion of the bottom surface or the top surface of the etch stop layer is exposed; and selectively etching the etch stop layer using a different etching process than the selectively etching the adjacent layer.
13. The method of claim 12 , wherein the adjacent layer comprises a substrate.
14. A method of producing a nitride-based heterostructure device, the method comprising: obtaining a partial nitride-based heterostructure; applying a nitride-based etch stop layer including indium (In) above the partial nitride-based heterostructure; applying a nitride-based cap layer having substantially no In directly on the etch stop layer; selectively etching the cap layer to expose at least a portion of a top surface of the etch stop layer, wherein the selectively etching stops when the at least a portion of the top surface of the etch stop layer is exposed; and selectively etching the etch stop layer using a different etching process than the selectively etching the cap layer.
15. The method of claim 14 , further comprising applying a contact within the etched portion of the partial nitride-based heterostructure.
16. The method of claim 14 , wherein the nitride-based heterostructure device comprises one of: a nitride-based heterostructure field effect transistor (HFET), a light emitting diode, a laser, or a micro-electro-mechanical device.
17. The method of claim 14 , wherein the selectively etching is performed in order to generate at least one of a recessed contact, or a facet for the device.
18. The method of claim 14 , further comprising applying a passivation layer above the cap layer.
19. The method of claim 14 , further comprising applying a dielectric layer above at least one of: the partial nitride-based heterostructure, the etch stop layer or the cap layer.
20. A method of producing a nitride-based integrated circuit, the method comprising: producing at least one nitride-based heterostructure device, the producing comprising: obtaining a partial nitride-based heterostructure; applying a nitride-based etch stop layer comprising indium (In) above the partial nitride-based heterostructure; applying a nitride-based cap layer including aluminum (Al) directly on the etch stop layer; and generating at least one of a recessed contact, a facet, or a photonic crystal for the device, the generating including selectively etching the cap layer to expose at least a portion of a top surface of the etch stop layer, wherein the selectively etching stops when the at least a portion of the top surface of the etch stop layer is exposed; then selectively etching the etch stop layer using a different etching process than the selectively etching the cap layer; and incorporating the nitride-based heterostructure device in the integrated circuit.
21. The method of claim 20 , wherein the integrated circuit comprises a nitride-based Monolithic Microwave Integrated Circuit.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 21, 2006
September 30, 2008
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