A hybrid navigation satellite receiver and mobile telephone uses only two crystal oscillators. One that operates a master clock around 27-MHz and that consumes milliwatts of power. The other oscillator consumes only microwatts of power and operates continuously on battery power at about 32-KHz. Only the second, low frequency oscillator is kept running during power “off”. On power “restart”, a real-time-clock counter is consulted to cause an estimate of the GPS system time to be regenerated and supplied to the GPS-DSP to quicken its initialization. The master clock is GPS-calibrated, and the accurate clock is used to drive NCO's for the mobile telephone part and host CPU.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An integrated satellite navigation receiver and communication device combination system, comprising: a single portable device that includes a global positioning system (GPS) receiver part and a communications transceiver part; said GPS receiver part including a GPS RF-receiver, a GPS digital processor and frequency generator (GPS-chip), a GPS oscillator (oscGPS), a lower-frequency oscillator (osc 3 ) operating at about 32-KHz, and a clock selector for selecting between clock frequency choices for normal and time-keeping only low-power operation; said communications transceiver part including a cellphone transceiver, a digital signal processor (DSP), a phone host CPU, a divider, and a voltage controlled oscillator (VCO); wherein, at turn-on, the GPS-chip loads a default startup processor clock synthesis-frequency value for said phone CPU, and a host processor clock frequency is generated by multiplying a GPS clock that is input to a numeric controlled oscillator (NCO) that can then be digitally programmed to generate a requested output frequency; and wherein, if the GPS receiver part is tracking GPS satellites and solving for frequency error, it compensates a requested frequency by computing the error in said GPS oscillator (oscGPS) to provide a more stable frequency to said VCO.
2. The system of claim 1 , wherein: said host CPU is enabled to chose different frequencies via a communication link between the host CPU and said GPS-chip; and said communications transceiver part can request a particular output frequency, and it can control when said VCO begins outputting such frequency.
3. The system of claim 1 , wherein: the communications transceiver part sends a request for said GPS receiver part to enter said low-power mode if a low-power mode is to be engaged.
4. The system of claim 1 , wherein: time is maintained with a low frequency crystal with an input from osc 3 .
5. The system of claim 1 , wherein: said GPS receiver part sends interrupts to the communications transceiver part that wake certain processes.
6. The system of claim 1 , wherein: the GPS receiver part puts itself into a sleeping, low-power mode and enables a user to decide when to use the GPS function.
7. The system of claim 1 , further comprising: a variable-VCO output from said GPS receiver part responsive to requests from said communications transceiver part to generate particular frequencies, waveforms, and phasing.
8. The system of claim 1 , further comprising: a time interval interrupt constructed from combinations of GPS-second and GPS-millisecond interrupts included in said GPS receiver part.
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February 27, 2008
November 11, 2008
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