A system for determining a history state of data in a data retaining device are disclosed. A state of a partially-depleted silicon-on-insulator (PD SOI) device coupled to a data retaining device is measured to indicate a body voltage of the PD SOI device. The body voltage of the PD SOI device may indicate, among others, how long the PD SOI device has been idling, which indirectly indicates how long data in the data retaining device has not been accessed. As such, the current invention may be used efficiently with, e.g., a cache replacement algorithm in a management of the data retaining device.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A system for determining a history state of data in a data retaining device, the system comprising: means for measuring a state of a partially-depleted silicon-on-insulator (PD SOI) device that is coupled to the data retaining device, the state indicating a body voltage of the PD SOI device; and means for determining the history state of the data in the data retaining device based on the measured state of the PD SOI device.
2. The system of claim 1 , wherein the state measuring means measures a subthreshold leakage current of the PD SOI device.
3. The system of claim 1 , wherein the history state determining means determines whether the PD SOI device has been idling for a period longer than at least one of: a period of idling of another different PD SOI device coupled to another different data retaining device; and a preset threshold for a period of idling.
4. The system of claim 1 , further including means for prioritizing the PD SOI device based on a provided priority of the data retaining device.
5. The system of claim 4 , wherein the PD SOI prioritizing means performs at least one of: controlling a decay rate of the PD SOI device; and assigning a weight factor to a state measurement result of the PD SOI device.
6. The system of claim 1 , further comprising means for determining an action upon the data retaining device based on the determined history state of the data in the data retaining device.
7. The system of claim 1 , wherein the PD SOI device includes multiple PD SOI field-effect-transistors (FET), the multiple PD SOI FETs being coupled together in a static random access memory.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
April 12, 2006
December 2, 2008
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