A method, an apparatus, and a computer program product are provided for completing a plurality of (direct memory access) DMA commands in a computer system. It is determined whether the DMA commands are chained together as a list DMA command. Upon a determination that the DMA commands are chained together as a list DMA command, it is also determined whether a current list element of the list DMA command is fenced. Upon a determination that the current list element is not fenced, a next list element is fetched and processed before the current list element has been completed.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for completing a plurality of (direct memory access) DMA commands in a computer system, the method comprising the steps of: determining whether the DMA commands are chained together as a list DMA command; upon a determination that the DMA commands are chained together as a list DMA command, determining whether a current list element of the list DMA command is fenced; and upon a determination that the current list element is not fenced, fetching and processing a next list element before the current list element has been completed.
2. The method of claim 1 , further comprising the step of, upon a determination that the current list element is fenced, fetching and processing the next list element after the current list element has been completed.
3. The method of claim 1 , wherein the computer system includes at least one processor having a local storage, the method further comprising the step of generating a table including indications of completion count, list, stall/fence, and finish.
4. The method of claim 1 , wherein the computer system includes a synergistic processing unit (SPU) and a processing unit (PU), the method further comprising the steps of: generating an SPU table including indications of completion count, list, stall/fence, and finish; and generating a PU table including indications of completion count, start, and finish.
5. The method of claim 3 , wherein the completion count is incremented when requests are issued to a bus in the computer system and is decremented when the bus completes a request.
6. The method of claim 3 , wherein the indication of list comprises one bit, which is set if the DMA commands constitute a list DMA command and reset when a last transfer/unroll of a last DMA command has been issued to a bus of the computer system.
7. The method of claim 3 , wherein the indication of stall/fence comprises one bit, which is set if the current list element is fenced and reset when the current list element with fenced/stall condition is acknowledged by the at least one processor.
8. The method of claim 3 , wherein the indication of finish comprises one bit, which is set when a last request for a DMA command has been issued and reset when a new command is fetched to a direct memory access controller (DMAC) of the computer system.
9. The method of claim 4 , wherein the completion count is incremented when requests are issued to a bus in the computer system and decremented when the bus completes a request.
10. The method of claim 4 , wherein the indication of list comprises one bit, which is set if the DMA commands constitute a list DMA command and reset when a last transfer/unroll of a last DMA command has been issued to a bus of the computer system.
11. The method of claim 4 , wherein the indication of stall/fence comprises one bit, which is set if the current list element is fenced and reset when the current list element with fenced/stall condition is acknowledged by the SPU.
12. The method of claim 4 , wherein the indication of start comprises one bit, which is set when a DMA command is fetched to a direct memory access controller (DMAC) of the computer system.
13. The method of claim 4 , wherein the indication of finish comprises one bit, which is set when a last request for a DMA command has been issued and reset when a new command is fetched to a direct memory access controller (DMAC) of the computer system.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 31, 2003
March 31, 2009
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.