A voltage regulation circuit for an RFID circuit having a voltage limiter circuit including a current sensing element for sensing current through the voltage limiter circuit. The voltage limiter generates a limited voltage. A voltage regulator is coupled to the limited voltage for generating a regulated output voltage. The voltage regulator has a dynamic biasing current responsive to an output of the sensing element for increasing bandwidth of the voltage regulator when current in the voltage limiter circuit increases.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A voltage regulation circuit for an RFID circuit comprising: a voltage limiter circuit having a current sensing element for sensing current through the voltage limiter circuit, the voltage limiter generating a limited voltage; a voltage regulator coupled to the limited voltage for generating a regulated output voltage, the voltage regulator having a dynamic biasing current responsive to an output of the sensing element for increasing bandwidth of the voltage regulator when current in the voltage limiter circuit increases.
2. The voltage regulation circuit of claim 1 wherein an input voltage to the voltage limiter circuit is a rectified output of an electromagnetic wave signal received by the RFID circuit.
3. The voltage regulation circuit of claim 2 wherein the voltage limiter comprises a plurality of current mirror-connected transistors, each of the transistors having a weighing resistor in its current path.
4. The voltage regulation circuit of claim 3 wherein the current sensing element is a diode-connected MOS transistor.
5. The voltage regulation circuit of claim 2 wherein each of the transistors has a different value weighting resistor.
6. The voltage regulation circuit of claim 5 wherein the current sensing element is a diode-connected MOS transistor.
7. The voltage regulation circuit of claim 2 wherein the current sensing element is a diode-connected MOS transistor.
8. The voltage regulation circuit of claim 1 wherein the voltage limiter comprises a plurality of current mirror-connected transistors, each of the transistors having a weighting resistor in its current path.
9. The voltage regulation circuit of claim 8 wherein each of the transistors has a different value weighting resistor.
10. The voltage regulation circuit of claim 9 wherein the current sensing element is a diode-connected MOS transistor.
11. The voltage regulation circuit of claim 8 wherein the current sensing element is a diode-connected MOS transistor.
12. The voltage regulation circuit of claim 1 wherein the current sensing element is a diode-connected MOS transistor.
13. The voltage regulation circuit of claim 1 wherein the circuit is built utilizing deep submicron CMOS technology.
14. The voltage regulation circuit of claim 1 wherein the dynamic bias current is provided by a degenerated transistor.
15. The voltage regulation circuit for an RFID circuit of claim 1 further comprising an RFID circuit coupled to an output of the voltage regulation circuit.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
August 26, 2005
May 26, 2009
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