A method of making a microelectronic element includes making a connection component by providing a metal layer having a top surface and a bottom surface, providing a dielectric layer over the top surface of the metal layer and forming openings in the dielectric layer to expose portions of the top surface of the metal layer. The method includes providing conductive elements atop the dielectric layer, at least some of the conductive elements extending through the openings in the dielectric layer and being in contact with the metal layer, and plating first conductive protrusions atop the at least some of the conductive elements extending through the openings in the dielectric layer, the first conductive protrusions extending away from the metal layer. The method includes selectively removing portions of the metal layer from the bottom surface of the metal layer to form second conductive protrusions that extend away from the first conductive protrusions. At least some of the first and second conductive protrusions are electrically interconnected with one another.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of making a microelectronic element comprising: making a connection component, comprising: providing a metal layer having a top surface and a bottom surface; providing a dielectric layer over the top surface of said metal layer; forming openings in said dielectric layer to expose portions of the top surface of said metal layer; providing conductive elements atop said dielectric layer, at least some of said conductive elements extending through the openings in said dielectric layer and being in contact with said metal layer; plating first conductive protrusions atop the at least some of said conductive elements extending through the openings in said dielectric layer, wherein said first conductive protrusions extend away from said metal layer and are exposed above a top surface of said dielectric layer; and selectively removing portions of said metal layer from the bottom surface of said metal layer to form second conductive protrusions that extend away from said first conductive protrusions, wherein at least some of said first and second conductive protrusions are electrically interconnected with one another.
2. The method as claimed in claim 1 , further comprising: after the providing conductive elements step, providing a second dielectric layer atop said conductive elements; and forming second openings in said second dielectric layer that are in alignment with the at least some of said conductive elements extending through the first openings in said first dielectric layer.
3. The method as claimed in claim 2 , wherein said second dielectric layer is a photosensitive resin film.
4. The method as claimed in claim 2 , wherein said first conductive protrusions extend through the second openings in said second dielectric layer.
5. The method as claimed in claim 1 , wherein said first dielectric layer is a photosensitive resin film.
6. The method as claimed in claim 1 , wherein said first conductive protrusions have apexes with spherical surfaces.
7. The method as claimed in claim 1 , wherein the selectively removing portions of said metal layer comprises etching away portions of said metal layer to form said second protrusions.
8. The method as claimed in claim 1 , further comprising providing a conductive material atop said second conductive protrusions.
9. The method as claimed in claim 1 , further comprising providing an insulating layer around said second conductive protrusions.
10. The method as claimed in claim 1 , further comprising: juxtaposing a semiconductor chip having contacts with said first conductive protrusions; and abutting said chip contacts against said first conductive protrusions for electrically interconnecting said semiconductor chip and said connection component.
11. The method as claimed in claim 1 , further comprising: making a second connection component similar to said first connection component; stacking said first connection component atop said second connection component; and electrically interconnecting said second connection component with said first connection component.
12. The method as claimed in claim 11 , wherein said second connection component has first and second conductive protrusions, the method further comprising: juxtaposing a second semiconductor chip having contacts with said second connection component; and electrically interconnecting said contacts of said second semiconductor chip with said first conductive protrusions on said second connection component.
13. A method of making a microelectronic element comprising: providing a metal layer having a top surface and a bottom surface; providing a dielectric layer over the top surface of said metal layer; forming openings in said dielectric layer to expose portions of the top surface of said metal layer; plating first conductive protrusions atop said dielectric layer so that at least some of said conductive protrusions extend through the openings in said dielectric layer, wherein said first conductive protrusions are electrically interconnected with said metal layer, extend away from said metal layer, and are exposed above a top surface of said dielectric layer; and selectively removing portions of said metal layer from the bottom surface thereof to form second conductive protrusions that extend away from said first conductive protrusions, wherein at least some of said first and second conductive protrusions are electrically interconnected with one another.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 17, 2006
June 16, 2009
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