Disclosed herein is a method for forming a gate structure of a semiconductor device. The method comprises forming a plurality of gates including a first gate dielectric film, a first gate conductive film, and a gate silicide film sequentially stacked on a silicon substrate having a field oxide film, forming a thermal oxide film on a side of the first gate conductive film, etching the silicon substrate exposed between the plurality of gates to a predetermined depth to form a plurality of trenches, forming a second gate oxide film on the interior wall of the trenches, and forming a second gate conductive film in a spacer shape on a predetermined region of the second gate oxide film, and on a side of the first gate conductive film, the gate silicide film, and the thermal oxide film.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for forming a gate structure of a semiconductor device, comprising: forming a plurality of gates including a first gate dielectric film, a first gate conductive film, and a gate silicide film sequentially stacked on a silicon substrate having a field oxide film; forming a thermal oxide film on a side of the first gate conductive film; etching the silicon substrate exposed between the plurality of gates to a predetermined depth to form a plurality of trenches; forming a second gate oxide film on an interior wall of the trenches; and forming a second gate conductive film of a spacer shape contacting a side of the gate silicide film and extending along the thermal oxide film and the second gate oxide film which is formed on the trenches.
2. The method according to claim 1 , further comprising: forming a spacer nitride film on the side of each gate where the second gate conductive film is formed; forming a source and a drain by implanting ions to a region of the silicon substrate formed with the spacer nitride film and exposed between the gates; and forming a plug by burying an electrode material on the silicon substrate where the source and the drain are formed.
3. The method according to claim 1 , wherein the thermal oxide film has a thickness of 20˜200 Å.
4. The method according to claim 1 , wherein the trenches have a depth of 200˜2,000 Å.
5. The method according to claim 1 , wherein the gate oxide film has a thickness of 30˜300 Å.
6. The method according to claim 1 , wherein the second gate conductive film is formed to an upper end of the gate silicide film.
7. The method according to claim 1 , wherein the second gate conductive film has a thickness of 200˜2,000 Å.
8. The method according to claim 1 , wherein the spacer nitride film has a depth of 50˜500 Å.
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November 8, 2005
July 21, 2009
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