A ferroelectric memory device is fabricated while mitigating edge degradation. A bottom electrode is formed over one or more semiconductor layers. A ferroelectric layer is formed over the bottom electrode. A top electrode is formed over the ferroelectric layer. The top electrode, the ferroelectric layer, and the bottom electrode are patterned or etched. A dry clean is performed that mitigates edge degradation. A wet etch/clean is then performed.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of fabricating a ferroelectric memory device, the method comprising: forming a bottom electrode over one or more semiconductor layers; forming a ferroelectric layer over the bottom electrode; forming a top electrode over the ferroelectric layer; patterning the top electrode; patterning the ferroelectric layer; patterning the bottom electrode, wherein the patterned top electrode, the patterned ferroelectric layer, and the patterned bottom electrode form a ferroelectric stack; and mitigating edge degradation of the ferroelectric stack by performing a dry clean process using a fluorine based plasma.
2. The method of claim 1 , further comprising forming the one or more semiconductor layers as an interlevel dielectric layer with contacts formed therein.
3. The method of claim 1 , wherein forming the bottom electrode comprises depositing a noble metal.
4. The method of claim 1 , wherein forming the bottom electrode comprises depositing a layer of Iridium.
5. The method of claim 1 , further comprising forming a bottom electrode diffusion barrier layer prior to forming the bottom electrode.
6. The method of claim 1 , wherein forming the ferroelectric layer comprises depositing PZT.
7. The method of claim 1 , wherein forming the top electrode comprises depositing a noble metal.
8. The method of claim 1 , wherein forming the top electrode comprises forming iridium oxide.
9. The method of claim 1 , further comprising forming a hard mask on the top electrode, wherein the hard mask covers a target ferroelectric stack region and exposes other portions of the top electrode.
10. A method of fabricating a ferroelectric memory device, the method comprising: forming a bottom electrode over one or more semiconductor layers; forming a ferroelectric layer over the bottom electrode; forming a top electrode over the ferroelectric layer; patterning the top electrode; patterning the ferroelectric layer; patterning the bottom electrode, wherein the patterned top electrode, the patterned ferroelectric layer, and the patterned bottom electrode form a ferroelectric stack; and mitigating edge degradation of the ferroelectric stack by performing a dry clean process, wherein the dry clean process is performed subsequent to patterning the bottom electrode and without a deionization rinse.
11. The method of claim 1 , wherein the dry clean process is performed prior to patterning the bottom electrode.
12. The method of claim 1 , further comprising performing a second dry clean process subsequent to patterning the bottom electrode, wherein the first dry clean process is performed prior to patterning the bottom electrode.
13. The method of claim 1 , wherein the dry clean process is performed with a plasma comprised of CF 4 /O 2 .
14. The method of claim 1 , wherein the dry clean process is performed with a plasma comprised of CF 4 /O 2 /Ar.
15. A method of fabricating a ferroelectric memory device, the method comprising: forming a bottom electrode over one or more semiconductor layers; forming a ferroelectric layer over the bottom electrode; forming a top electrode over the ferroelectric layer; patterning the top electrode; patterning the ferroelectric layer; patterning the bottom electrode, wherein the patterned top electrode, the patterned ferroelectric layer, and the patterned bottom electrode form a ferroelectric stack; and mitigating edge degradation of the ferroelectric stack by performing a dry clean process, wherein the dry clean process is performed with a plasma that generates isotropic fluoride species that slightly etch the ferroelectric layer and reacts with other debris to form residual reaction products.
16. The method of claim 15 , further comprising performing a wet clean process comprised of phosphoric acid that removes the residual reaction products.
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May 30, 2006
August 11, 2009
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