A multi-layered packet processing device using multiple processors for processing a received multi-layered packet at a hardware level. The multi-layered packet processing device includes an interface for transmitting a data packet to a node and receiving the data packet from the node through a public network; and a plurality of packet processing portions for sequentially processing the data packet, in a pipeline pattern, according to a header of the data packet transferred through the interface.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A multi-layered packet processing device, comprising: an interface of a public network for transmitting a data packet to a node and receiving the data packet from the node through a public network; and a plurality of packet processing portions for sequentially processing the data packet in a pipeline pattern, according to a header of the data packet transferred from the interface of the public network, wherein each of the plurality of packet processing portions receives the data packet which comprises the header and a payload.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
May 1, 2006
September 22, 2009
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