Low noise analog sampling circuit and a method for low noise sampling of an analog signal

1. A low noise analog sampling circuit comprising a transistor coupled to a first feedback loop and to a second feedback loop; wherein during a first operational phase, the first feedback loop is closed such as to affect a state of the transistor in response to an analog input signal; wherein at an end of the first operational phase the first feedback loop is opened and introduces a first noise; wherein during a second operational phase the second feedback loop provides the transistor a feedback signal that is responsive to an amplified error signal; wherein the error signal represents a difference between (i) a sampled signal representative of a state of the transistor short period before the first feedback loop is opened and (ii) a signal representative of a current state of the transistor; wherein at an end of the second operational phase the second feedback loop is opened and introduces a second noise that is attenuated by multiple capacitors of the second feedback loop such as to provide an attenuated second noise that substantially smaller than the first noise; wherein during another operational phase the transistor outputs an output signal responsive to the analog input signal and to the attenuated second noise; and wherein during the first operational phase the second feedback loop is closed and an amplifier of the second feedback loop is set to a non-amplifying state.

2. The low noise analog sampling circuit according to claim 1 during the second operational phase the amplifier is set to an amplifying state.

3. A low noise analog sampling circuit comprising a transistor coupled to a first feedback loop and to a second feedback loop; wherein during a first operational phase, the first feedback loop is closed such as to affect a state of the transistor in response to an analog input signal; wherein at an end of the first operational phase the first feedback loop is opened and introduces a first noise; wherein during a second operational phase the second feedback loop provides the transistor a feedback signal that is responsive to an amplified error signal; wherein the error signal represents a difference between (i) a sampled signal representative of a state of the transistor short period before the first feedback loop is opened and (ii) a signal representative of a current state of the transistor; wherein at an end of the second operational phase the second feedback loop is opened and introduces a second noise that is attenuated by multiple capacitors of the second feedback loop such as to provide an attenuated second noise that substantially smaller than the first noise; wherein during another operational phase the transistor outputs an output signal responsive to the analog input signal and to the attenuated second noise; and wherein the second feedback loop comprises a second capacitor that is charged, during the second operational phase, to a voltage level that is responsive to the amplified error signal; wherein the amplified error signal is provided to the second capacitor via a third switch; wherein at the end of the second operational phase the third switch is opened and introduces the second noise to the second capacitor; and wherein the second noise is attenuated by a third and a fourth capacitors of the second feedback loop such as to provide to the transistor an attenuated second noise.

4. A low noise analog sampling circuit comprising a transistor coupled to a first feedback loop and to a second feedback loop; wherein during a first operational phase, the first feedback loop is closed such as to affect a state of the transistor in response to an analog input signal; wherein at an end of the first operational phase the first feedback loop is opened and introduces a first noise; wherein during a second operational phase the second feedback loop provides the transistor a feedback signal that is responsive to an amplified error signal; wherein the error signal represents a difference between (i) a sampled signal representative of a state of the transistor short period before the first feedback loop is opened and (ii) a signal representative of a current state of the transistor; wherein at an end of the second operational phase the second feedback loop is opened and introduces a second noise that is attenuated by multiple capacitors of the second feedback loop such as to provide an attenuated second noise that substantially smaller than the first noise; wherein during another operational phase the transistor outputs an output signal responsive to the analog input signal and to the attenuated second noise; and wherein second noise is attenuated by an attenuation factor that is responsive to a relationship between a capacitance of third and fourth capacitors.

5. The low noise analog sampling circuit according to claim 4 wherein the attenuation factor exceeds ten.

6. The low noise analog sampling circuit according to claim 4 wherein the attenuation factor exceeds fifteen.

7. A low noise analog sampling circuit comprising a transistor coupled to a first feedback loop and to a second feedback loop; wherein during a first operational phase, the first feedback loop is closed such as to affect a state of the transistor in response to an analog input signal; wherein at an end of the first operational phase the first feedback loop is opened and introduces a first noise; wherein during a second operational phase the second feedback loop provides the transistor a feedback signal that is responsive to an amplified error signal; wherein the error signal represents a difference between (i) a sampled signal representative of a state of the transistor short period before the first feedback loop is opened and (ii) a signal representative of a current state of the transistor; wherein at an end of the second operational phase the second feedback loop is opened and introduces a second noise that is attenuated by multiple capacitors of the second feedback loop such as to provide an attenuated second noise that substantially smaller than the first noise; wherein during another operational phase the transistor outputs an output signal responsive to the analog input signal and to the attenuated second noise; and wherein the second feedback loop comprises an amplifier that comprises a first input and a second input, the first input of the amplifier is coupled to a drain of the transistor and the second input of the amplifier is coupled to a second end of a second switch; wherein a first end of the second switch is coupled to the drain of the transistor; wherein short period before the first feedback loop is opened the second switch is opened so that the first capacitor stores a sampled signal representative of the state of the transistor short period before the first feedback loop is opened; and wherein the amplifier outputs, during the second operational phase, the amplifier error signal.

8. The low noise analog sampling circuit according to claim 7 wherein the second feedback loop comprises an amplifier, an output of the amplifier is coupled to a first end of a third switch, a second end of the third switch is coupled to a first end of a second capacitor and to a first end of a third capacitor, a second end of the third capacitor is coupled to a gate of the transistor and to a first end of a fourth capacitor, and wherein a capacitance of the third transistor is substantially smaller than a capacitance of the fourth capacitor.

9. A method for low noise sampling of an analog signal, the method comprises: receiving an analog input signal; closing, during a first operational phase, a first feedback loop that is coupled to a transistor, such as to affect a state of the transistor in response to the analog input signal; opening, at an end of the first operational phase, the first feedback loop such as to introduce a first noise; providing, during a second operational phase, to the transistor and by a second feedback loop, a feedback signal that is responsive to an amplified error signal; wherein the error signal represents a difference between (i) a sampled signal representative of a state of the transistor short period before the first feedback loop is opened and (ii) a current state of the transistor; opening, at an end of the second operational phase, the second feedback loop such as to introduce a second noise; attenuating the second noise signal by multiple capacitors of the second feedback loop, such as to provide an attenuated second noise that substantially smaller than the first noise; outputting, during another operational phase, an output signal responsive to the analog input signal and to the attenuated second noise; and closing, during the first operational phase the second feedback loop, and setting an amplifier of the second feedback loop to a non-amplifying state.

10. The method according to claim 9 wherein the providing comprises setting the amplifier to an amplifying state.

11. A method for low noise sampling of an analog signal, the method comprises: receiving an analog input signal; closing, during a first operational phase, a first feedback loop that is coupled to a transistor, such as to affect a state of the transistor in response to the analog input signal; opening, at an end of the first operational phase, the first feedback loop such as to introduce a first noise; providing, during a second operational phase, to the transistor and by a second feedback loop, a feedback signal that is responsive to an amplified error signal; wherein the error signal represents a difference between (i) a sampled signal representative of a state of the transistor short period before the first feedback loop is opened and (ii) a current state of the transistor; opening, at an end of the second operational phase, the second feedback loop such as to introduce a second noise; attenuating the second noise signal by multiple capacitors of the second feedback loop, such as to provide an attenuated second noise that substantially smaller than the first noise; outputting, during another operational phase, an output signal responsive to the analog input signal and to the attenuated second noise; and charging, during the second operational phase, a second capacitor of the second feedback loop to a voltage level that is responsive to the amplified error signal; wherein the providing comprises providing the amplified error signal to the second capacitor via a third switch; wherein the opening comprises opening the third switch such as to introduce the second noise to the second capacitor; and wherein the attenuating comprises attenuating the second noise by a third and a fourth capacitors of the second feedback loop.

12. A method for low noise sampling of an analog signal, the method comprises: receiving an analog input signal; closing, during a first operational phase, a first feedback loop that is coupled to a transistor, such as to affect a state of the transistor in response to the analog input signal; opening, at an end of the first operational phase, the first feedback loop such as to introduce a first noise; providing, during a second operational phase, to the transistor and by a second feedback loop, a feedback signal that is responsive to an amplified error signal; wherein the error signal represents a difference between (i) a sampled signal representative of a state of the transistor short period before the first feedback loop is opened and (ii) a current state of the transistor; opening, at an end of the second operational phase, the second feedback loop such as to introduce a second noise; attenuating the second noise signal by multiple capacitors of the second feedback loop, such as to provide an attenuated second noise that substantially smaller than the first noise; and outputting, during another operational phase, an output signal responsive to the analog input signal and to the attenuated second noise; wherein the attenuating comprises attenuating by an attenuation factor that is responsive to a relationship between a capacitance of third and fourth capacitors that belong to the second feedback loop.

13. The method according to claim 12 wherein the attenuation factor exceeds ten.

14. The method according to claim 12 wherein the attenuation factor exceeds fifteen.

15. The method according to claim 9 wherein the opening is preceded by providing to the amplifier: (i) a sampled signal representative of a state of the transistor a short period before the first feedback loop is opened and (ii) a signal representative of a current state of the transistor; wherein the sampled signal is sampled by a first capacitor of the second feedback loop.

16. The method according to claim 9 wherein the attenuating comprises attenuating a second noise by a capacitor voltage divider that comprises third capacitor and a fourth capacitor, wherein a capacitance of the third transistor is substantially smaller than a capacitance of the fourth capacitor.