The temperature distribution associated with a design of an integrated circuit is calculated by convoluting a surface power usage represented by a power matrix with a heat spreading function. The heat spreading function may be calculated from a simulation of a point source on the integrated circuit using a finite element analysis model of the integrated circuit or other techniques. To account for spatial variations on the chip, the heat spreading function may be made dependent on position using a position scaling function. Steady-state or transient temperature distributions may be computed by using a steady-state or transient heat spreading function. A single heat spreading function may be convolved with various alternative power maps to efficiently calculate temperature distributions for different designs. In an inverse problem, one can calculate the power map from an empirically measured temperature distribution and a heat spreading function using various de-convolution techniques. While the forward problem is analogous to image blurring, the inverse problem is analogous to image restoration.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A computer-implemented method for calculating a temperature distribution associated with a design of an integrated circuit, the method comprising: representing by the computer a power usage on the surface of the integrated circuit by a power matrix; calculating by the computer a heat spreading function from a temperature profile of a point source on the integrated circuit; and convolving by the computer the power matrix with the heat spreading function to obtain the temperature distribution.
2. The method of claim 1 wherein the temperature profile is derived from a measurement of an empirical temperature profile from a point heat source on the integrated circuit.
3. The method of claim 1 further comprising calculating by the computer the temperature profile from a simulation of a point source on the integrated circuit.
4. The method of claim 3 wherein the temperature profile is calculated using a finite element analysis model of the integrated circuit.
5. The method of claim 1 wherein the heat spreading function is scaled using a position scaling function.
6. The method of claim 1 further comprising calculating a separate heat spreading function for each of multiple regions of the surface of the integrated circuit.
7. The method of claim 1 wherein the heat spreading function represents a steady-state heat spreading.
8. The method of claim 1 wherein the heat spreading function represents a transient heat spreading.
9. The method of claim 1 wherein the power distribution on the chip is expanded based on the mirror images at various boundaries near the chip edge.
10. The method of claim 1 wherein the calculated temperature distribution is scaled based on the temperature distribution from a uniform heat source everywhere on top of the chip.
11. The method of claim 1 wherein the power matrix represents power usage on a region of the surface of the integrated circuit, and wherein the heat spreading function represents a heat spreading on the region of the surface of the integrated circuit.
12. The method of claim 1 wherein convolving the power matrix with the heat spreading function comprises using a fast Fourier transform.
13. A computer-implemented method for calculating a three dimensional temperature distribution associated with a design of a three dimensional integrated circuit, the method comprising: representing by the computer a power usage in the volume of the integrated circuit by a three dimensional power matrix; and convolving by the computer the three dimensional power matrix with a three dimensional heat spreading function to obtain the three dimensional temperature distribution.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
April 12, 2007
December 1, 2009
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