A stack structure of circuit boards embedded with semiconductor components therein is proposed, which includes at least two semiconductor components embedded circuit boards, a plurality of conductive bumps, and at least one adhesive layer. The circuit boards are each formed with a circuit layer having a plurality of electrical connection pads. The conductive bumps are formed on the electrical connection pads of at least one of the circuit boards. The adhesive layer is formed between the circuit boards such that a portion of the adhesive layer between the conductive bumps and the electrical connection pads, or between the opposing conductive bumps, forms a conductive channel and thereby forms an electrical connection between the circuit boards.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A stack structure of circuit boards with semiconductor components embedded therein, comprising: at least two circuit boards each having a first circuit layer formed thereon and a cavity formed therein, wherein the cavity is used to receive a semiconductor component having a plurality of electrode pads, and the first circuit layer is formed with a plurality of first electrical connection pads and a plurality of first conductive vias for electrically connecting the electrode pads of the semiconductor component and the first electrical connection pads of the first circuit layer, wherein one end of each of the first conductive vias is directly connected to corresponding one of the first electrical connection pads, and the other end of the each of the first conductive vias is directly connected to corresponding one of the electrode pads; a plurality of conductive bumps formed on the first electrical connection pads of at least one of the circuit boards; and at least an adhesive layer interposed between the circuit boards, allowing a conductive channel to be formed by a portion of the adhesive layer positioned between the conductive bumps of one of the at least two circuit boards and the first electrical connection pads of another one of the at least two circuit boards corresponding thereto, such that an electrical connection between the circuit boards is formed, wherein the adhesive layer is an anisotropic conductive adhesive comprising an adhesive resin, a hardening agent, and conductive particles.
2. The stack structure of circuit boards with semiconductor components embedded therein of claim 1 , wherein the semiconductor component is one of an active component and a passive component.
3. The stack structure of circuit boards with semiconductor components embedded therein of claim 1 , wherein the circuit boards are either one of a printed circuit board or an IC package substrate.
4. The stack structure of circuit boards with semiconductor components embedded therein of claim 1 , further comprising an insulating protective layer formed on an adhesive-layer-free surface of each one of the circuit boards and formed with a plurality of openings for exposing the first electrical connection pads.
5. The stack structure of circuit boards with semiconductor components embedded therein of claim 1 , further comprising a circuit build up structure formed on an adhesive-layer-free surface of each of the circuit boards and formed with a plurality of second electrical connection pads and a plurality of second conductive vias for electrically connecting with the first circuit layer.
6. The stack structure of circuit boards with semiconductor components embedded therein of claim 5 , further comprising an insulating protective layer formed on the circuit build up structure and formed with a plurality of openings for exposing the second electrical connection pads.
7. The stack structure of circuit boards with semiconductor components embedded therein of claim 5 , wherein the circuit build up structure further comprises a dielectric layer and a second circuit layer formed on the dielectric layer on which the plurality of second conductive vias are formed.
8. The stack structure of circuit boards with semiconductor components embedded therein of claim 1 , wherein the conductive bumps are made of a metallic material selected from the group consisting of copper, silver, gold, nickel-gold, and nickel-lead-gold.
9. A stack structure of circuit boards with semiconductor components embedded therein, comprising: at least two circuit boards each having a first circuit layer formed thereon and a cavity disposed therein, wherein the cavity is used to receive a semiconductor component having a plurality of electrode pads, and the first circuit layer is formed with a plurality of first electrical connection pads and a plurality of first conductive vias for electrically connecting the electrode pads of the semiconductor component and the first electrical connection pads of the first circuit layer, wherein one end of each of the first conductive vias is directly connected to corresponding one of the first electrical connection pads, and the other end of the each of the first conductive vias is directly connected to corresponding one of the electrode pads; a plurality of conductive bumps formed on the first electrical connection pads of the circuit boards; and at least an adhesive layer interposed between the circuit boards, allowing a conductive channel to be formed by a portion of the adhesive layer positioned between the opposing conductive bumps formed on each of the at least two circuit boards such that an electrical connection between the circuit boards is formed, wherein the adhesive layer is an anisotropic conductive adhesive comprising an adhesive resin, a hardening agent, and conductive particles.
10. The stack structure of circuit boards with semiconductor components embedded therein of claim 9 , wherein the semiconductor component is one of an active component and a passive component.
11. The stack structure of circuit boards with semiconductor components embedded therein of claim 9 , wherein the circuit boards are either one of a printed circuit board or an IC package substrate.
12. The stack structure of circuit boards with semiconductor components embedded therein of claim 9 , further comprising an insulating protective layer formed on an adhesive-layer-free surface of each of the circuit boards and formed with a plurality of openings for exposing the first electrical connection pads.
13. The stack structure of circuit boards with semiconductor components embedded therein of claim 9 , further comprising a circuit build up structure formed on an adhesive-layer-free surface of each of the circuit boards and formed with a plurality of second electrical connection pads and a plurality of second conductive vias for electrically connecting the first circuit layer.
14. The stack structure of circuit boards with semiconductor components embedded therein of claim 13 , further comprising an insulating protective layer formed on the circuit build up structure and formed with a plurality of openings for exposing the second electrical connection pads.
15. The stack structure of circuit boards with semiconductor components embedded therein of claim 13 , wherein the circuit build up structure further comprises a dielectric layer on which the second conductive vias are formed and a second circuit layer formed on the dielectric layer.
16. The stack structure of circuit boards with semiconductor components embedded therein of claim 9 , wherein the conductive bumps is made of a metallic material selected from the group consisting of copper, silver, gold, nickel-gold, and nickel-lead-gold.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
May 31, 2007
February 2, 2010
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