A semiconductor high-voltage device including a semiconductor substrate having a deep trench formed therein, a gate oxide film formed on sidewalls of the deep trench, a polysilicon layer formed in the deep trench and on the gate oxide film, and spacers formed on sidewalls of the trench at a portion of the deep trench above the gate oxide film. Loss of a gate oxide film can be prevented during processing, thereby also preventing a change of a current path, a phenomenon such as current leakage between a top surface of polysilicon and source/drain regions.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method comprising: forming first photoresist patterns defining nitride film spacer regions by performing a first photolithographic process on a semiconductor substrate; and then etching the semiconductor substrate along the first photoresist patterns; and then removing the first photoresist patterns; and then depositing an etch-stop film over the semiconductor substrate; and then performing an etchback process on the etch-stop film; and then forming a hard mask on the semiconductor substrate including the etch-stop film; and then performing a second photolithographic process on the hard mask to form second photoresist patterns defining gate electrode regions; and then patterning the hard mask by performing a dry etch process employing the second photoresist patterns; and then forming spacers by patterning the etch-stop film to expose the surface of the semiconductor substrate.
2. The method of claim 1 , wherein a pattern width of each of the second photoresist patterns is the same as a pattern width of the first photoresist pattern.
3. The method of claim 1 , wherein the etchback process is performed on the etch-stop film so that the uppermost surface of the etch-stop film is on the same plane as the uppermost surface of the semiconductor substrate.
4. The method of claim 3 , wherein the etch-stop film comprises a nitride film.
5. The method of claim 1 , wherein forming the spacers comprises forming the spacers in polysilicon regions of a trench structure by performing a patterning process on the etch-stop film.
6. The method of claim 5 , wherein the spacers comprise a nitride film.
7. The method of claim 1 , further comprising, after forming the spacers: forming deep trenches by patterning the semiconductor substrate; and then forming a gate oxide film in the deep trenches and on sidewalls of the spacers; and then depositing polysilicon on the gate oxide film to gap-fill the trenches; and then removing a portion of the polysilicon by performing a second etchback process on the polysilicon; and then removing the hard mask and a portion of the polysilicon.
8. A method comprising: forming a first trench in a semiconductor substrate; and then forming a nitride film on the semiconductor substrate and in the first trench; and then forming a first nitride film pattern in the first trench by performing a first etchback process on the nitride film; and then forming a first oxide film on the semiconductor substrate including the nitride film pattern; and then forming spacers composed of second nitride film patterns on sidewalls of the first trench by patterning the first nitride film pattern to expose the first trench; and then forming a second trench as a deep trench by patterning an exposed portion of the semiconductor substrate corresponding to the first trench; and then forming a second oxide film on sidewalls of the second trench and the spacers; and then forming a polysilicon layer in the second trench and on the second oxide film; and then removing portions of the polysilicon layer and the first oxide film; and then removing the remaining portion of the first oxide film and another portion of the polysilicon layer.
9. The method of claim 8 , wherein forming the first nitride film pattern comprises forming the first nitride film pattern such that the uppermost surface of the first nitride film pattern lies on the same plane as the uppermost surface of the semiconductor substrate.
10. The method of claim 8 , wherein the spacers are provided on a portion of the sidewalls of the second trenches.
11. The method of claim 10 , wherein forming the spacers comprises forming the spacers such that the uppermost surface of the spacers lies on the same plane as the uppermost surface of the semiconductor substrate.
12. The method of claim 8 , wherein forming the first trench comprises performing a first etching process exposing a portion of the semiconductor substrate.
13. The method of claim 12 , wherein the first etching process comprises a dry etching process.
14. The method of claim 8 , wherein forming the first trench comprises: forming first photoresist patterns on the semiconductor substrate; and then performing a etching process on the semiconductor substrate along the first photoresist patterns.
15. The method of claim 14 , wherein the etching process comprises a dry etching process.
16. The method of claim 8 , wherein removing the remaining portion of the first oxide film and another portion of the polysilicon layer comprises: exposing sidewalls of the spacers.
17. The method of claim 8 , wherein forming the nitride film comprises forming the nitride film as an etch-stop film.
18. The method of claim 8 , wherein forming the first oxide film comprises forming the first oxide film as a hard mask.
19. The method of claim 8 , wherein forming the second oxide film comprises forming the second oxide film as a gate oxide film.
20. An apparatus comprising: a semiconductor substrate having a deep trench formed therein; a gate oxide film formed on sidewalls of the deep trench; a polysilicon layer formed in the deep trench and on the gate oxide film; and spacers formed on sidewalls of the trench at a portion of the deep trench above the gate oxide film.
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June 25, 2008
March 30, 2010
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