A semiconductor package system includes providing a die having a plurality of contact pads. A leadframe is formed having a plurality of lead fingers with the plurality of lead fingers having a fine pitch and each having a substantially trapezoidal cross-section. A plurality of bumps is formed on the plurality of lead fingers, the plurality of bumps are on the tops and extend down the sides of the plurality of lead fingers. A plurality of bond wires is attached to the plurality of contact pads and to the plurality of bumps. An encapsulant is formed over the plurality of lead fingers, the die, and the plurality of bond wires, the encapsulant leaving lower surfaces of the plurality of lead fingers exposed.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor package system comprising: a die having a plurality of contact pads; a leadframe having a plurality of lead fingers with flat tops of predetermined lengths, the plurality of lead fingers having a fine pitch and each having a trapezoidal cross-section; a plurality of bumps on the plurality of lead fingers, the plurality of bumps on the tops, extending beyond the widths of the trapezoidal cross-sections, and clamping down on the two sides of each of the plurality of lead fingers; a plurality of bond wires attached to the plurality of contact pads, the plurality of bond wires to the plurality of bumps; and an encapsulant over the plurality of lead fingers, the die, and the plurality of bond wires, the encapsulant with lower surfaces of the plurality of lead fingers exposed.
2. The system as claimed in claim 1 wherein the leadframe further comprises the tops of the plurality of lead fingers to have a flat upper surface.
3. The system as claimed in claim 1 wherein the leadframe further comprises the tops of the plurality of lead fingers to have a non-flat upper surface.
4. The system as claimed in claim 1 wherein the plurality of bond wires is attached to the plurality of bumps by stitch bonds.
5. The system as claimed in claim 1 wherein the plurality of bond wires is attached to the plurality of bumps by stitch bonds wider than the tops of the plurality of lead fingers.
6. A semiconductor package system comprising: a leadframe having a die paddle and a plurality of lead fingers with flat tops of predetermined lengths, the plurality of lead fingers having a fine pitch and each having a trapezoidal cross-section; a die having a plurality of contact pads, the die attached to the die paddle with the contact pads up; a plurality of bumps attached to the plurality of lead fingers, the plurality of bumps on the tops, extending beyond the widths of the trapezoidal cross-sections, and clamping down on the two sides of each of the plurality of lead fingers; a plurality of bond wires attached to the plurality of contact pads, the plurality of bond wires attached to the plurality of bumps; and an encapsulant over the plurality of lead fingers, the die, and the plurality of bond wires, the encapsulant with lower surfaces of the plurality of lead fingers exposed.
7. The system as claimed in claim 6 wherein the leadframe further comprises the tops of the plurality of lead fingers having flat or non-flat surfaces.
8. The system as claimed in claim 6 wherein the leadframe further comprises the tops of the plurality of lead fingers having widths less than or equal to about 40 microns.
9. The system as claimed in claim 6 wherein forming the leadframe further comprises the plurality of lead fingers having a fine pitch spacing of less than or equal to about 90 microns.
10. The system as claimed in claim 6 wherein: the plurality of bond wires are attached to the plurality of contact pads by ball bonds; and the plurality of bond wires are attached to the plurality of bumps by stitch bonds.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
September 16, 2005
June 8, 2010
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