After a first insulating film is formed on a substrate, a wiring groove is formed in the first insulating film, and then a wire is formed inside the wiring groove. Subsequently, a protection film is formed on the first insulating film and on the wire, and then a hard mask film is formed on the protection film. After that, the hard mask film is patterned. Subsequently, the protection film and the first insulating film are partially removed using the patterned hard mask film to form an air gap groove, and then a second insulating film is formed to close an upper portion of the air gap groove for forming an air gap.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for fabricating a semiconductor device comprising the steps of: (a) forming a first insulating film on a substrate; (b) forming a wiring groove in the first insulating film; (c) forming a wire inside the wiring groove; (d) forming a protection film on the first insulating film and on the wire; (e) forming a hard mask film on the protection film; (f) patterning the hard mask film; (g) partially removing the protection film and the first insulating film using the patterned hard mask film to form an air gap groove; and (h) forming a second insulating film to close an upper portion of the air gap groove for forming an air gap, wherein: the method further includes, between the steps (g) and (h), step of (i) removing the hard mask film, and the step (i) includes performing wet etching to remove the hard mask film, and removing part of the first insulating film located near the air gap groove to extend the air gap groove.
2. The method of claim 1 , wherein the first insulating film is a SiO 2 film or a FSG film.
3. The method of claim 1 , wherein the protection film is a SiN film, a SiC film, or a SiCN film.
4. The method of claim 1 , wherein the hard mask film is a TEOS film, a SiOC film, a SiN film, a SiCO film, or a SiCN film.
5. The method of claim 1 , wherein the hard mask film is a metal film.
6. The method of claim 1 , wherein step (f) includes: forming a resist mask on the hard mask film; partially removing the hard mask film using the resist mask to pattern the hard mask film; and removing the resist mask.
7. The method of claim 1 , wherein step (g) includes performing wet etching to partially remove the first insulating film.
8. The method of claim 1 , wherein step (c) includes: sequentially stacking a barrier film and a conducting layer over the first insulating film and inside the wiring groove; and removing part of the barrier film and part of the conducting layer which are lying outside the wiring groove.
9. The method of claim 8 , wherein the barrier film includes a metal nitride or a metal silicide nitride.
10. The method of claim 9 , wherein a metal included in the metal nitride or the metal silicide nitride is titanium, tantalum, or tungsten.
11. The method of claim 1 , wherein step (c) includes forming a cap film covering an upper surface of the wire.
12. The method of claim 11 , wherein the cap film includes tungsten or a tungsten alloy.
13. The method of claim 12 , wherein the tungsten alloy is cobalt tungsten phosphorus, cobalt tungsten boron, or cobalt tungsten phosphorus boron.
14. The method of claim 11 , wherein the cap film includes a metal nitride or a metal silicide nitride.
15. The method of claim 14 , wherein a metal included in the metal nitride or the metal silicide nitride is titanium, tantalum, or tungsten.
16. A method for fabricating a semiconductor device comprising the steps of: (a) forming a first insulating film on a substrate; (b) forming a plurality of wires adjacent to each other in the first insulating film; (c) forming a hard mask film on the first insulating film and on the plurality of wires; (d) patterning the hard mask film to form an opening; (g) removing a part of the first insulating film located under the opening of the patterned hard mask film to form an air gap groove; and (h) forming a second insulating film to close an upper portion of the air gap groove for forming an air gap, wherein: a width of the opening is equal to or larger than a size of an inter-wire space of the plurality of wires, and the hard mask film is a TEOS film, a SiOC film, a SiN film, s SiCO film, a SiCN film or a metal film.
17. The method of claim 16 , further comprising, between (b) and (c), forming a protection film on the first insulating film and on the plurality of wires.
18. The method of claim 16 , further comprising, between (e) and (f), removing a part of the first insulating film located near the air gap groove to extend the air gap groove.
19. The method of claim 16 , wherein: at the step of (d), the opening is formed over a first inter-wire space of the plurality of wires and the opening is not formed over a second inter-wire space of the plurality of wires, at the step of (e), the air gap groove is formed in the first inter-wire space and the air gap groove is not formed in the second inter-wire space, and at the step of (f), the air gap is formed in the first inter-wire space and the air gap is not formed in the second inter-wire space.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
March 31, 2008
June 22, 2010
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