A method for manufacturing a semiconductor device includes the steps of forming first and second semiconductor wafers each including an array of chips and elongate electrodes, forming a groove on scribe lines separating the chips from one another; coating a surface of one of the semiconductor wafers with adhesive; bonding together the semiconductor wafers while allowing the groove to receive therein excessive adhesive; and heating the wafers to connect the elongate electrodes of both the semiconductor wafers.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for manufacturing a semiconductor device comprising: forming first and second semiconductor wafers each including therein a plurality of chips and an elongate electrode, said chips being separated from one another by a scribe line; forming a groove on a surface of at least one of said semiconductor wafers along said scribe line; coating said surface of said at least one of said semiconductor wafers or a surface of the other of said semiconductor wafers with first adhesive; bonding together said first and second semiconductor wafers by using said first adhesive while allowing said groove to receive therein excessive adhesive; and connecting together said elongate electrodes of said first and second semiconductor wafers.
2. The method according to claim 1 , wherein said groove forming uses a half-cut dicing technique.
3. The method according to claim 1 , wherein said groove has a larger cross-section than said scribe lines.
4. The method according to claim 1 , further comprising: forming a third semiconductor wafer including therein a plurality of chips and an elongate electrode; forming, on a surface of said third said semiconductor wafer, a groove along a scribe line separating said semiconductor chips from one another; polishing an exposed surface of one of said first and second semiconductor wafers to expose an end of said elongate electrode; forming a coupling terminal on said end of said elongate electrode; coating said polished surface or a said surface of said third semiconductor wafer with second adhesive; bonding together said third semiconductor wafer and said one of said semiconductor wafers having said exposed surface by using said second adhesive while allowing said groove to receive therein excessive adhesive; and connecting together said elongate electrode of said third semiconductor wafer and said coupling terminal.
5. The method according to claim 4 , wherein said coupling terminal forming includes electroplating using a dry film to deposit a metallic film.
6. A method for manufacturing a semiconductor device comprising: forming first and second semiconductor wafers each including therein a plurality of chips and an elongate electrode, said chips being separated from one another by a scribe line; forming a groove on a surface of at least one of said semiconductor wafers along said scribe line; coating said surface of said at least one of said semiconductor wafers or a surface of the other of said semiconductor wafers with first adhesive; bonding together said first and second semiconductor wafers by using said first adhesive while allowing said groove to receive therein excessive adhesive; connecting together said elongate electrodes of said first and second semiconductor wafers; forming a third semiconductor wafer including therein a plurality of chips and an elongate electrode; forming, on a surface of said third said semiconductor wafer, a groove along a scribe line separating said semiconductor chips from one another; polishing an exposed surface of one of said first and second semiconductor wafers to expose an end of said elongate electrode; forming a coupling terminal on said end of said elongate electrode; coating said polished surface or a said surface of said third semiconductor wafer with second adhesive; bonding together said third semiconductor wafer and said one of said semiconductor wafers having said exposed surface by using said second adhesive while allowing said groove to receive therein excessive adhesive; and connecting together said elongate electrode of said third semiconductor wafer and said coupling terminal.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
December 14, 2007
July 13, 2010
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