Patentable/Patents/US-7757363
US-7757363

Support system for semiconductor wafers

PublishedJuly 20, 2010
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A semiconductor wafer may be secured to a wafer support system by causing a supported surface of the semiconductor wafer to be at a lower gas pressure than an exposed surface of the semiconductor wafer.

Patent Claims
11 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A system comprising: a semiconductor wafer; and a wafer support system, the wafer support system comprising: a first body comprising one or more openings extending through the first body from a first surface to a second surface thereof, the first surface supporting the semiconductor wafer; a second body adjacent to said second surface of said first body, wherein the second body comprises one or more cavities, the one or more cavities trapping gas pressure when sealed, wherein said one or more cavities have orifices extending through the second body from a side adjacent to said second surface to a side opposite said second surface; and a flexible membrane attached to said opposite side, wherein when said flexible membrane is pushed into said cavities said orifices are sealed.

2

2. The system of claim 1 , wherein said first body and said second body form an integral unit.

3

3. The system of claim 1 , wherein said first and second bodies are separable.

4

4. The of claim 1 , wherein said conductor wafer comprises dies and said one or more cavities are arranged to correspond with an arrangement of said dies on the semiconductor wafer.

5

5. The system of claim 4 , wherein a smallest of said cavities is substantially equivalent in area to an area of a smallest of dies on said semiconductor wafer.

6

6. The system of claim 1 , wherein a number of said cavities substantially equals a number of said openings.

7

7. The system of claim 6 , wherein said cavities are arranged to provide fluid communication between said openings on said first surface and said orifices on said opposite side.

8

8. The system of claim 1 , wherein said flexible membrane and said one or more cavities are arranged to allow unsealing of individual ones of said orifices on said opposite side.

9

9. The system of claim 1 , wherein said flexible membrane is removable.

10

10. The system of claim 1 , wherein said first surface is rigid.

11

11. The system of claim 1 , wherein an area of each of said cavities is larger than an area of a corresponding opening of the first surface.

Classification Codes (CPC)

Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.

Patent Metadata

Filing Date

April 7, 2006

Publication Date

July 20, 2010

Want to explore more patents?

Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.

Citation & reuse

Analysis on this page is generated by Patentable — an AI-powered patent intelligence platform. AI-generated summaries, explanations, and analysis may be reused with attribution and a visible link back to the canonical URL below. Patent abstracts and claims are USPTO public domain.

Cite as: Patentable. “Support system for semiconductor wafers” (US-7757363). https://patentable.app/patents/US-7757363

© 2026 Patentable. All rights reserved.

Patentable is a research and drafting-assistant tool, not a law firm, and does not provide legal advice. Documents we generate are drafts for review by a licensed patent attorney.