Lattice-mismatched materials having configurations that trap defects within sidewall-containing structures.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A structure including lattice-mismatched materials, the structure comprising: a substrate including a first crystalline material and having a top substrate surface; a non-crystalline mask layer disposed above the substrate, the non-crystalline mask layer having a top surface and an opening defined by sidewalls extending from the top surface of the non-crystalline mask layer to the top substrate surface; a second crystalline material disposed in the opening, the second crystalline material having a lattice mismatch to the first crystalline material and a thickness sufficient to permit a majority of defects arising from the lattice mismatch to exit the second crystalline material at the sidewalls; and a third crystalline material disposed above the second crystalline material and defining a junction therebetween, the junction confining selected charge carriers to one side of the junction.
2. A structure including lattice-mismatched materials comprising: a substrate comprising a first crystalline semiconductor material; a second crystalline semiconductor material having a lattice mismatch to the substrate, the second crystalline semiconductor material being disposed on the substrate in a predetermined configuration defining a top surface and a lateral sidewall surface extending from a top surface of the substrate to the top surface defined by the predetermined configuration, the sidewall surface having a height above the substrate top surface sufficient to permit a majority of defects arising from the lattice mismatch to exit the second crystalline semiconductor material at the lateral sidewall surface; and a third crystalline semiconductor material substantially lattice matched with the second crystalline material, the third crystalline material being disposed on at least a portion of the sidewall surface of the second crystalline material to define an outer sidewall surface.
3. A structure including lattice-mismatched materials comprising: a substrate including a first crystalline semiconductor material; a mask layer disposed above the substrate, the mask layer having a top surface and a plurality of openings defined by sidewalls extending-through the mask layer from the top-surface to the substrate; a second crystalline material disposed within each of the openings and having a lattice mismatch to the first crystalline material and a thickness sufficient to permit a majority of defects arising from the lattice mismatch to exit the second material at the sidewalls; and a third crystalline semiconductor material disposed within the openings above the second crystalline material and defining a junction in each opening for confining selected charge carriers to one side of the junction.
4. A structure including lattice-mismatched materials, the structure comprising: a substrate including a first crystalline material; a non-crystalline mask layer disposed above the substrate, the mask layer having a top surface and a plurality of openings defined by sidewalls extending from the top surface of the non-crystalline mask layer to a top surface of the substrate; a second crystalline material disposed in the openings, the second crystalline material having a lattice mismatch to the first crystalline material and a thickness sufficient to permit a majority of defects arising from the lattice mismatch to exit the second material at the sidewalls; and a third crystalline material disposed above the second crystalline material, the third crystalline material disposed in each opening being non-contiguous with the third crystalline material disposed in other openings.
5. A structure including lattice-mismatched materials, the structure comprising: a substrate including a first crystalline material and having a top substrate surface; a non-crystalline mask layer disposed above the substrate, the non-crystalline mask layer having a top surface and an opening defined by sidewalls extending from the top surface of the non-crystalline mask layer to the top substrate surface; a second crystalline material disposed in the opening, the second crystalline material having a lattice mismatch to the first crystalline material and a thickness sufficient to permit a majority of defects arising from the lattice mismatch to exit the second crystalline material at the sidewalls; and a third crystalline material disposed above the second crystalline material and defining a junction therebetween, wherein the second and third crystalline materials are substantially lattice matched.
6. A structure including lattice-mismatched materials comprising: a substrate including a first crystalline semiconductor material; a mask layer disposed above the substrate, the mask layer having a top surface and a plurality of openings defined by sidewalls extending through the mask layer from the top surface to the substrate; a second crystalline material disposed within each of the openings and having a lattice mismatch to the first crystalline material and a thickness sufficient to permit a majority of defects arising from the lattice mismatch to exit the second material at the sidewalls; and a third crystalline semiconductor material disposed within the openings above the second crystalline material and defining a junction in each opening, wherein the second and third crystalline materials are substantially lattice matched.
7. The structure of claim 1 , wherein the second crystalline material comprises defects arising from the lattice mismatch to the first crystalline material, and the majority of the defects exit the second crystalline material at the sidewalls.
8. The structure of claim 1 , wherein the first crystalline material and the third crystalline material are different, and the third crystalline material is substantially free of defects.
9. The structure of claim 1 , wherein a top surface of the third crystalline material is substantially coplanar with the top surface of the non-crystalline mask layer.
10. The structure of claim 3 , wherein the second crystalline material comprises defects arising from the lattice mismatch to the first crystalline material, and the majority of the defects exit the second crystalline material at the sidewalls.
11. The structure of claim 3 , wherein the first crystalline material and the third crystalline material are different, and the third crystalline material is substantially free of defects.
12. The structure of claim 3 , wherein, in each of the openings, a top surface of the third crystalline material is substantially coplanar with the top surface of the non-crystalline mask layer.
13. The structure of claim 4 , wherein the second crystalline material comprises defects arising from the lattice mismatch to the first crystalline material, and the majority of the defects exit the second crystalline material at the sidewalls.
14. The structure of claim 4 , wherein the first crystalline material and the third crystalline material are different, and the third crystalline material is substantially free of defects.
15. The structure of claim 4 , wherein, in each of the openings, a top surface of the third crystalline material is substantially coplanar with the top surface of the non-crystalline mask layer.
16. The structure of claim 2 , wherein the second crystalline semiconductor material and the third crystalline semiconductor material are different.
17. The structure of claim 2 , wherein the third crystalline semiconductor material has a wider bandgap than a bandgap of the second crystalline semiconductor material.
18. The structure of claim 2 , further comprising an insulating material disposed adjacent to and in contact with the outer sidewall surface.
19. The structure of claim 18 , wherein the insulating material and the second and third crystalline semiconductor materials each defines a respective planar top surface, and the planar top surfaces are substantially coplanar.
20. The structure of claim 2 , wherein the third crystalline semiconductor material is disposed over substantially the entire lateral sidewall surface.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
March 23, 2007
August 17, 2010
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