A non-volatile storage system which reduces program disturb. Multiple boosting modes are implemented while programming non-volatile storage. For example, self-boosting, local self-boosting, erased area self-boosting and revised erased area self-boosting may be used. One or more switching criteria are used to determine when to switch to a different boosting mode. The boosting mode may be used to prevent program disturb in unselected NAND strings while storage elements are being programmed in selected NAND strings. By switching boosting modes, an optimal boosting mode can be used as conditions change. The boosting mode can be switched based on various criteria such as program pulse number, program pulse amplitude, program pass number, the position of a selected word line, whether coarse or fine programming is used, whether a storage element reaches a program condition and/or a number of program cycles of the non-volatile storage device.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for operating non-volatile storage, comprising: implementing a first boosting mode but not a second boosting mode during a first programming phase in which programming of at least one storage element in a set of non-volatile storage elements occurs, the at least one storage element is in communication with a selected word line, the first programming phase applies program pulses to the selected word line, and each program pulse in the first programming phase is followed by a verify operation; and implementing the second boosting mode but not the first boosting mode during a second programming phase in which programming of the at least one storage element continues, the second programming phase applies program pulses to the selected word line, and each program pulse in the second programming phase is followed by a verify operation.
2. The method of claim 1 , wherein: a threshold voltage of the at least one storage element is increased from a first level to a second level during the first programming phase, and from the second level to a third level during the second programming phase.
3. The method of claim 1 , wherein: the first programming phase comprises a first pass of a multi-pass programming technique and the second programming phase comprises a second pass of the multi-pass programming technique.
4. The method of claim 1 , wherein: the first programming phase involves coarse programming and the second programming phase involves fine programming.
5. The method of claim 1 , further comprising: switching from implementing the first boosting mode to implementing the second boosting mode based on when at least one other storage element in the set of non-volatile storage elements reaches a specified programming condition.
6. The method of claim 1 , further comprising: switching from implementing the first boosting mode to implementing the second boosting mode based on a number of programming cycles experienced by the set of non-volatile storage elements, where the set of non-volatile storage elements programs faster as the set of non-volatile storage elements undergoes additional programming cycles.
7. The method of claim 1 , wherein: the set of non-volatile storage elements is provided in a plurality of NAND strings, including a selected NAND string in which the at least one storage element is provided, and an unselected NAND string, and the first and second boosting modes boost a channel of the unselected NAND string.
8. The method of claim 1 , wherein: the implementing of the first boosting mode comprises applying a first voltage to an end word line associated with the unselected NAND string during each program pulse of the first programming phase, and the implementing of the second boosting mode comprises applying a second voltage to the end word line during each program pulse of the second programming phase.
9. The method of claim 1 , wherein: the implementing of the first boosting mode comprises applying a voltage to an unselected word line of the set of non-volatile storage elements which is adjacent to the selected word line; and the implementing of the second boosting mode comprises applying a different voltage to the unselected word line.
10. The method of claim 1 , wherein: the implementing of the first boosting mode comprises applying a voltage to an unselected word line of the set of non-volatile storage elements which is non-adjacent to the selected word line; and the implementing of the second boosting mode comprises applying a different voltage to the unselected word line.
11. A non-volatile storage system, comprising: a set of non-volatile storage elements; and one or more control circuits in communication with the set of non-volatile storage elements, the one or more control circuits implement a first boosting mode but not a second boosting mode during a first programming phase in which programming of at least one storage element in the set of non-volatile storage elements occurs, the first programming phase applies program pulses to the set of non-volatile storage elements, and the first programming phase applies verify pulses to the set of non-volatile storage elements between successive ones of the program pulses of the first programming phase, and implement the second boosting mode but not the first boosting mode during a second programming phase in which programming of the at least one storage element continues, the second programming phase applies program pulses to the set of non-volatile storage elements, and the second programming phase applies verify pulses to the set of non-volatile storage elements between successive ones of the program pulses of the second programming phase.
12. The non-volatile storage system of claim 11 , wherein: a threshold voltage of the at least one storage element is increased from a first level to a second level during the first programming phase, and from the second level to a third level during the second programming phase.
13. The non-volatile storage system of claim 11 , wherein: the first programming phase comprises a first pass of a multi-pass programming technique and the second programming phase comprises a second pass of the multi-pass programming technique.
14. The non-volatile storage system of claim 11 , wherein: the set of non-volatile storage elements is provided in a plurality of NAND strings, including a selected NAND string in which the at least one storage element is provided, and an unselected NAND string, and the first and second boosting modes boost a channel of the unselected NAND string.
15. The non-volatile storage system of claim 11 , wherein: the first programming phase involves coarse programming and the second programming phase involves fine programming.
16. The non-volatile storage system of claim 11 , wherein: the one or more control circuits switch from implementing the first boosting mode to implementing the second boosting mode based on when at least one other storage element in the set of non-volatile storage elements reaches a specified programming condition.
17. The non-volatile storage system of claim 11 , wherein: the one or more control circuits switch from implementing the first boosting mode to implementing the second boosting mode based on a number of programming cycles experienced by the set of non-volatile storage elements, where the set of non-volatile storage elements programs faster as the set of non-volatile storage elements undergoes additional programming cycles.
18. The non-volatile storage system of claim 11 , wherein: the one or more control circuits, to implement the first boosting mode, apply a voltage to an unselected word line of the set of non-volatile storage elements; and the one or more control circuits, to implement the second boosting mode, apply a different voltage to the unselected word line.
19. A method for operating non-volatile storage, comprising: implementing a first boosting mode during a first programming phase in which programming of at least one storage element in a set of non-volatile storage elements occurs; and implementing a second boosting mode during a second programming phase in which programming of the at least one storage element continues; the set of non-volatile storage elements are provided in a plurality of NAND strings, including a selected NAND string in which the at least one storage element is provided, and an unselected NAND string, the first and second boosting modes boost a channel of the unselected NAND string; the implementing of the first boosting mode comprises boosting the channel without isolating a portion of the channel on a source-side of the unselected NAND string from a portion of the channel on a drain-side of the unselected NAND string; and the implementing of the second boosting mode comprises isolating a portion of the channel on a source-side of the unselected NAND string from a portion of the channel on a drain-side of the unselected NAND string.
20. The method of claim 19 , wherein: the source-side is a programmed side of the unselected NAND string and the drain-side is an erased side of the unselected NAND string.
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September 16, 2008
September 14, 2010
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