Patentable/Patents/US-7808096
US-7808096

Semiconductor package and production method thereof, and semiconductor device

PublishedOctober 5, 2010
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A semiconductor package production method includes the step of die-cutting part of a lead side portion of a seal formed by molding and dam bars using a pedestal and punch. The pedestal has an outer surface at a position retreating from a side surface of an upper seal portion as far as possible and an inner surface generally near a side surface of a lower seal portion. Width Wa of the upper surface of the upper surface of the pedestal is smaller than the overhang size of the upper seal portion. Tip end region Ra of the lead side portion which is present right under the overhang portion of the upper seal portion has a slanted surface Fa1which is sloped inwardly from top to bottom.

Patent Claims
6 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A semiconductor package comprising a plurality of leads for transmission/reception of a signal between a semiconductor chip and an external device and a seal for sealing at least part of the plurality of leads, wherein: part of the seal which surrounds each of the leads includes a lower seal portion present under a lower surface of the lead, an upper seal portion present over an upper surface of the lead, part of the upper seal portion overhanging outward beyond the lower seal portion, and a lead side portion present between the lower seal portion and the upper seal portion, the lead side portion filling a gap between the leads; each of the leads has an outer lead protruding out of the seal and an inner lead buried in the seal; and an outer surface of the lead side portion which exists right below the part of the upper seal portion overhanging outward beyond the lower seal portion is slanted inwardly along a downward direction from a lowermost part of an outer surface of the upper seal portion.

2

2. The semiconductor package of claim 1 , wherein the width of a tip region of the lead side portion protruding from the lower seal portion is in the range of a ⅕ to ⅘ of an overhang size of the upper seal portion.

3

3. A semiconductor package comprising a plurality of leads for transmission/reception of a signal between a semiconductor chip and an external device and a seal for sealing at least part of the plurality of leads, wherein: part of the seal which surrounds each of the leads includes a lower seal portion present under a lower surface of the lead, an upper seal portion present over an upper surface of the lead, part of the upper seal portion overhanging outward beyond the lower seal portion, and a lead side portion present between the lower seal portion and the upper seal portion, the lead side portion filling a gap between the leads; each of the leads has an outer lead protruding out of the seal and an inner lead buried in the seal; an outer surface of the lead side portion which exists right below the part of the upper seal portion overhanging outward beyond the lower seal portion is slanted inwardly along a downward direction from a lowermost part of an outer surface of the upper seal portion; and a tip region of the lead side portion protruding from the lower seal portion is not in contact with a portion of the outer lead which is to be bent.

4

4. A semiconductor device comprising a semiconductor chip, a plurality of leads for transmission/reception of a signal between the semiconductor chip and an external device, a connection member for electrically connecting part of the semiconductor device with each of the leads, and a seal for sealing at least part of the plurality of leads, wherein: part of the seal which surrounds each of the leads includes a lower seal portion present under a lower surface of the lead, an upper seal portion present over an upper surface of the lead, part of the upper seal portion overhanging outward beyond the lower seal portion, and a lead side portion present between the lower seal portion and the upper seal portion, the lead side portion filling a gap between the leads; each of the leads has an outer lead protruding out of the seal and having a bent distal end and an inner lead buried in the seal; an outer surface of the lead side portion which exists right below the part of the upper seal portion overhanging outward beyond the lower seal portion is slanted inwardly along a downward direction from a lowermost part of an outer surface of the upper seal portion.

5

5. The semiconductor device of claim 4 , wherein the width of a tip region of the lead side portion protruding from the lower seal portion is in the range of a ⅕ to ⅘ of an overhang size of the upper seal portion.

6

6. A semiconductor device comprising a semiconductor chip, a plurality of leads for transmission/reception of a signal between the semiconductor chip and an external device, a connection member for electrically connecting part of the semiconductor device with each of the leads, and a seal for sealing at least part of the plurality of leads, wherein: part of the seal which surrounds each of the leads includes a lower seal portion present under a lower surface of the lead, an upper seal portion present over an upper surface of the lead, part of the upper seal portion overhanging outward beyond the lower seal portion, and a lead side portion present between the lower seal portion and the upper seal portion, the lead side portion filling a gap between the leads; each of the leads has an outer lead protruding out of the seal and having a bent distal end and an inner lead buried in the seal; an outer surface of the lead side portion which exists right below the part of the upper seal portion overhanging outward beyond the lower seal portion is slanted inwardly along a downward direction from a lowermost part of an outer surface of the upper seal portion; and a tip region of the lead side portion protruding from the lower seal portion is not in contact with the bent portion of the outer lead.

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Patent Metadata

Filing Date

May 12, 2005

Publication Date

October 5, 2010

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Cite as: Patentable. “Semiconductor package and production method thereof, and semiconductor device” (US-7808096). https://patentable.app/patents/US-7808096

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