Patentable/Patents/US-7821401
US-7821401

RFID tag containing two tuned circuits

PublishedOctober 26, 2010
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

An RFID tag is disclosed adapted to be read by an interrogator including a reader antenna having a carrier frequency. The tag includes a first circuit including a first inductor and a first capacitor, wherein the first circuit is tuned to a frequency above the carrier frequency to compensate for detuning in the presence of a plurality of tags. The RFID tag includes a second circuit including a second inductor and a second capacitor wherein the first and second inductors are arranged to be coupled electromagnetically with a coupling factor less than unity and the second circuit is tuned to increase coupling between the first circuit and the reader antenna. A method of reading an RFID tag in the presence of a plurality of tags is also disclosed.

Patent Claims
39 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. An RFID tag adapted to be read by an interrogator including a reader antenna having a carrier frequency, said tag including: a first circuit including a first inductor and a first capacitor, wherein said first circuit is tuned to a frequency above said carrier frequency to compensate for detuning in the presence of a plurality of tags; a second circuit including a second inductor and a second capacitor; and wherein said first and second inductors are arranged to be coupled electromagnetically with a coupling factor less than unity and said second circuit is tuned to increase coupling between said first circuit and said reader antenna.

2

2. A tag according to claim 1 wherein said first circuit includes a chip.

3

3. A tag according to claim 2 wherein said chip includes said first capacitor.

4

4. A tag according to claim 1 wherein said coupling factor is substantially 0.7.

5

5. A tag according to claim 1 wherein said first inductor includes a first loop and said second inductor includes a second loop larger than said first loop.

6

6. A tag according to claim 5 wherein an edge of said first loop is aligned with an edge of said second loop.

7

7. A tag according to claim 5 wherein said first and second loops are concentric.

8

8. A tag according to claim 5 wherein said first and second loops are eccentric.

9

9. A tag according to claim 5 wherein said second capacitor includes a parasitic capacitor formed by capacitance between windings of said second loop.

10

10. A tag according to claim 1 wherein said first and second inductors are connected at a common tapping point.

11

11. A tag according to claim 1 wherein said first and second inductors are formed on a common substrate.

12

12. A tag according to claim 11 wherein said first and second inductors are formed on opposite sides of said common substrate.

13

13. A tag according to claim 11 wherein said first and second inductors are formed on the same side of said common substrate and are separated by an insulator.

14

14. A tag according to claim 1 wherein said first and second inductors are formed on separate substrates.

15

15. A tag according to claim 1 wherein said first and second inductors are wound in the same sense.

16

16. A tag according to claim 1 wherein said second circuit is tuned above the frequency of said first circuit.

17

17. A tag according to claim 16 wherein said second circuit is tuned between 80-160% above the frequency of said carrier.

18

18. A tag according to claim 1 wherein said first circuit is tuned between 10-50% above the frequency of said carrier.

19

19. A tag according claim 1 wherein said carrier is 13.56 MHz, said first circuit is tuned to between 15-20 MHz and said second circuit is tuned to between 25-35 MHz.

20

20. An optical data carrier including a tag according to claim 1 .

21

21. A method of reading an RFID tag in the presence of a plurality of tags by an interrogator including a reader antenna having a carrier frequency, said tag including a first circuit having a first inductor and a first capacitor, said method including the steps of: tuning said first circuit to a frequency above said carrier frequency to compensate for detuning in the presence of said tags; providing a second circuit having a second inductor and a second capacitor; electromagnetically coupling said first and second indicators with a coupling factor less than unity; and tuning said second circuit to increase coupling between said first circuit and said reader antenna.

22

22. A method according to claim 21 wherein said first circuit includes a chip.

23

23. A method according to claim 22 wherein said chip includes said first capacitor.

24

24. A method according to claim 21 wherein said coupling factor is substantially 0.7.

25

25. A method according to claim 21 wherein said first inductor includes a first loop and said second inductor includes a second loop larger than said first loop.

26

26. A method according to claim 25 wherein an edge of said first loop is aligned with an edge of said second loop.

27

27. A method according to claim 25 wherein said first and second loops are concentric.

28

28. A method according to claim 25 wherein said first and second loops are eccentric.

29

29. A method according to claim 25 wherein said second capacitor includes a parasitic capacitor formed by capacitance between windings of said second loop.

30

30. A method according to claim 21 wherein said first and second inductors are connected at a common tapping point.

31

31. A method according to claim 21 wherein said first and second inductors are formed on a common substrate.

32

32. A method according to claim 31 wherein said first and second inductors are formed on opposite sides of said common substrate.

33

33. A method according to claim 31 wherein said first and second inductors are formed on the same side of said common substrate and are separated by an insulator.

34

34. A method according to claim 21 wherein said first and second inductors are formed on separate substrates.

35

35. A method according to claim 21 wherein said first and second inductors are wound in the same sense.

36

36. A method according to claim 21 including tuning said second circuit above the frequency of said first circuit.

37

37. A method according to claim 36 wherein said second circuit is tuned between 80-160% above the frequency of said carrier.

38

38. A method according to claim 21 wherein said first circuit is tuned between 10-50% above the frequency of said carrier.

39

39. A method according to claim 21 wherein said carrier is 13.56 MHz, said first circuit is tuned to between 15-20 MHz and said second circuit is tuned to between 25-35 MHz.

Classification Codes (CPC)

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Patent Metadata

Filing Date

July 5, 2006

Publication Date

October 26, 2010

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