A silicon-made low-forward-voltage Schottky barrier diode is serially combined with a high-antivoltage-strength high-electron-mobility transistor made from a nitride semiconductor that is wider in bandgap than silicon. The Schottky barrier diode has its anode connected to the gate, and its cathode to the source, of the HEMT. This HEMT is normally on. The reverse voltage withstanding capability of the complete device depends upon that between the drain and gate of the HEMT.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A composite semiconductor device comprising: (A) a semiconductor rectifier having an anode and a cathode electrode; (B) a unipolar field effect transistor comprising: (a) a source electrode coupled to said cathode electrode of said semiconductor rectifier; (b) a drain electrode; and (c) a gate electrode connected to said anode electrode of said semiconductor rectifier; (d) said unipolar field effect transistor being adapted to turn on when a voltage is impressed between said anode electrode of said semiconductor rectifier and said drain electrode of said field effect transistor in a direction to forward bias said semiconductor rectifier; (e) a current flowing between said gate electrode and said drain electrode of said field effect transistor when said field effect transistor is on being less than a current flowing between said anode and said cathode electrode of said semiconductor rectifier; (f) a voltage withstanding capability between said drain electrode and said gate electrode of said field effect transistor being higher than that of said semiconductor rectifier when a voltage is impressed between said anode electrode of said semiconductor rectifier and said drain electrode of said field effect transistor in a direction to reverse bias said semiconductor rectifier; (C) a first terminal electrically connected to said anode electrode of said semiconductor rectifier and said gate electrode of said field effect transistor; and (D) a second terminal electrically connected to said drain electrode of said field effect transistor.
2. A composite semiconductor device as defined in claim 1 , wherein said semiconductor rectifier is selected from among a silicon pin junction diode, silicon pn-junction diode, and silicon Schottky barrier diode of less voltage withstanding capability than that of known compound semiconductor diodes.
3. A composite semiconductor device as defined in claim 1 , wherein said field effect transistor is selected from among a high electron mobility transistor, metal semiconductor field effect transistor, insulated gate field effect transistor, junction gate field effect transistor, and static induction transistor.
4. A composite semiconductor device as defined in claim 1 , wherein said field effect transistor is made from a material selected from among nitride semiconductors, silicon carbide, and semiconductors having a wider bandgap than silicon.
5. A composite semiconductor device as defined in claim 1 , wherein said field effect transistor has a threshold voltage whose absolute value is less than the maximum voltage capable of being withstood by said semiconductor rectifier.
6. A composite semiconductor device having a Schottky barrier diode and a unipolar field effect transistor in combination, said device comprising: (a) a first silicon semiconductor region containing a prescribed conductivity type determinant in a first prescribed concentration; (b) a second silicon semiconductor region contiguous to said first silicon semiconductor region, said second silicon semiconductor region containing said prescribed conductivity type determinant in a second prescribed concentration which is higher than said first prescribed concentration; (c) a compound semiconductor region contiguous to said second silicon semiconductor region, said compound semiconductor region having a plurality of semiconductor layers for providing the unipolar field effect transistor; (d) a Schottky electrode contiguous to said first silicon semiconductor region for providing the Schottky barrier diode; (e) a source, a drain and a gate electrode contiguous to said compound semiconductor region for providing the field effect transistor; (f) a first conductor for electrically connecting said source electrode of the field effect transistor to said second silicon semiconductor region; (g) a second conductor for electrically connecting said gate electrode of the field effect transistor to said Schottky electrode of the Schottky barrier diode; (h) said field effect transistor becoming conductive between said source electrode and said drain electrode thereof upon application of a voltage between said Schottky electrode of the Schottky barrier diode and said drain electrode of the field effect transistor in a direction to forward bias a Schottky barrier formed by said Schottky electrode and said first silicon semiconductor region; (i) a current flowing between said gate electrode and said drain electrode of the field effect transistor when the field effect transistor is on being less than a current flowing between said Schottky electrode of the Schottky barrier diode and said first conductor; (j) a voltage withstanding capability between said drain electrode and said gate electrode of the field effect transistor being higher than that of the Schottky barrier diode when a voltage is impressed between said Schottky electrode of the Schottky barrier diode and said drain electrode of the field effect transistor in a direction to reverse bias the Schottky barrier diode.
7. A composite semiconductor device having a pn- or pin junction diode and a unipolar field effect transistor in combination, said device comprising: (a) a first silicon semiconductor region containing a first prescribed conductivity type determinant in a first prescribed concentration; (b) a second silicon semiconductor region contiguous to said first silicon semiconductor region; (c) a third silicon semiconductor region contiguous to said second silicon semiconductor region, said third silicon semiconductor region containing a second prescribed conductivity type determinant in a second prescribed concentration; (d) a compound semiconductor region contiguous to said third silicon semiconductor region, said compound semiconductor region having a plurality of semiconductor layers for providing the unipolar field effect transistor; (e) a first electrode in ohmic contact with said first silicon semiconductor region for providing the junction diode; (f) a second electrode in ohmic contact with said third silicon semiconductor region for providing the junction diode; (g) a source, a drain and a gate electrode contiguous to said compound semiconductor region for providing the field effect transistor; (h) a first conductor for electrically connecting said source electrode of the field effect transistor to said second electrode of the junction diode; (i) a second conductor for electrically connecting said gate electrode of the field effect transistor to said first electrode of the junction diode; (j) said field effect transistor becoming conductive between said source electrode and said drain electrode thereof upon application of a voltage between said first electrode of the junction diode and said drain electrode of the field effect transistor in a direction to forward bias the junction diode; (k) a current flowing between said gate electrode and said drain electrode of the field effect transistor when the field effect transistor is on being less than a current flowing between said first and said second electrode of the junction diode; (l) a voltage withstanding capability between said drain electrode and said gate electrode of the field effect transistor being higher than that of the junction diode when a voltage is impressed between said first electrode of the junction diode and said drain electrode of the field effect transistor in a direction to reverse bias the junction diode.
8. A compound semiconductor device as defined in claim 7 , wherein said second silicon semiconductor region contains either of said first and said second conductivity type determinant in a third prescribed concentration which is less than said first prescribed concentration.
9. A compound semiconductor device having a semiconductor rectifier and a unipolar field effect transistor in combination, said device comprising: (a) a first semiconductor body having a plurality of semiconductor layers for providing the field effect transistor; (b) a source, a drain and a gate electrode on one major surface of said first semiconductor body; (c) a second semiconductor body formed on said first semiconductor body and electrically insulated therefrom, said second semiconductor body having a plurality of semiconductor layers for providing the semiconductor rectifier; (d) a first and a second electrode on a pair of opposite major surfaces, respectively, of said second semiconductor body for providing the semiconductor rectifier; (e) a first conductor for electrically connecting said second electrode of the semiconductor rectifier to said source electrode of the field effect transistor; (f) a second conductor for electrically connecting said gate electrode of the field effect transistor to said first electrode of the semiconductor rectifier; (g) said field effect transistor becoming conductive between said source electrode and said drain electrode thereof upon application of a voltage between said first electrode of the semiconductor rectifier and said drain electrode of the field effect transistor in a direction to forward bias the semiconductor rectifier; (h) a current flowing between said gate electrode and said drain electrode of the field effect transistor when the field effect transistor is on being less than a current flowing between said first and said second electrode of the semiconductor rectifier; (h) a voltage withstanding capability between said drain electrode and said gate electrode of the field effect transistor being higher than that of the semiconductor rectifier when a voltage is impressed between said first electrode of the semiconductor rectifier and said drain electrode of the field effect transistor in a direction to reverse bias the semiconductor rectifier.
10. A composite semiconductor device as defined in claim 9 , further comprising an additional transistor formed on said first semiconductor substrate and electrically insulated therefrom, said additional transistor having a third and a fourth electrode electrically connected respectively to said first and said second electrode of the semiconductor rectifier.
11. A compound semiconductor device having a semiconductor rectifier and a unipolar field effect transistor in combination, said device comprising: (a) a first semiconductor body having a plurality of semiconductor layers for providing the field effect transistor; (b) a source and a gate electrode on one of a pair of opposite major surfaces of said first semiconductor body; (c) a drain electrode on the other of the pair of opposite major surfaces of said first semiconductor body; (d) a second semiconductor body formed on said one major surface of said first semiconductor body and electrically insulated therefrom, said second semiconductor body having a plurality of semiconductor layers for providing the semiconductor rectifier; (e) a first and a second electrode on a pair of opposite major surfaces, respectively, of said second semiconductor body for providing the semiconductor rectifier; (f) a first conductor for electrically connecting said second electrode of the semiconductor rectifier to said source electrode of the field effect transistor; (g) a second conductor for electrically connecting said gate electrode of the field effect transistor to said first electrode of the semiconductor rectifier; (h) said field effect transistor becoming conductive between said source electrode and said drain electrode thereof upon application of a voltage between said first electrode of the semiconductor rectifier and said drain electrode of the field effect transistor in a direction to forward bias the semiconductor rectifier; (i) a current flowing between said gate electrode and said drain electrode of the field effect transistor when the field effect transistor is on being less than a current flowing between said first and said second electrode of the semiconductor rectifier; (j) a voltage withstanding capability between said drain electrode and said gate electrode of the field effect transistor being higher than that of the semiconductor rectifier when a voltage is impressed between said first electrode of the semiconductor rectifier and said drain electrode of the field effect transistor in a direction to reverse bias the semiconductor rectifier.
12. A composite semiconductor device as defined in claim 11 , further comprising an additional transistor formed on said first semiconductor substrate and electrically insulated therefrom, said additional transistor having a third and a fourth electrode electrically connected respectively to said first and said second electrode of the semiconductor rectifier.
13. A composite semiconductor device as defined in claim 1 , further comprising an additional transistor having a third and a fourth electrode electrically connected respectively to said first and said second electrode of the semiconductor rectifier.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
January 16, 2008
November 2, 2010
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