A semiconductor apparatus comprising a silicon substrate; an device housing space including a concave portion formed in the silicon substrate and a hole perforating through the bottom surface of the concave portion; a plurality of laminated semiconductor devices provided in the device housing space; a first lid which lids the concave portion and a second lid which lids the hole, for sealing the semiconductor devices; and via plugs which are connected to the semiconductor devices, penetrating the bottom surface of the concave portion.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor apparatus including: a silicon substrate; a device housing space including a concave portion formed in the silicon substrate and a hole formed adjacent to and touching a bottom surface of the concave portion; a plurality of semiconductor devices provided in the device housing space, the semiconductor devices comprising a first semiconductor device and a second semiconductor device; a first lid which seals the concave portion and a second lid which seals the hole so as to seal the semiconductor devices in the device housing space, and via plugs which are connected to any one of the plurality of semiconductor devices while penetrating the bottom surface of the concave portion, the first semiconductor device is mounted in the hole and the second semiconductor device is mounted in the concave portion, the first semiconductor device is mounted on an active face of the second semiconductor device and electrically connected to the second semiconductor device, and the second semiconductor device is housed in the concave portion such that the active face thereof is opposed to the bottom surface of the concave portion, and electrically connected to the via plugs, wherein electrical connections are made in the active face, and a connection pad and a wire are provided on the active face.
2. The semiconductor apparatus according to claim 1 , wherein the plurality of semiconductor devices include a MEMS device and a driver device used for the MEMS device.
3. The semiconductor apparatus according to claim 2 , wherein the driver device is connected to the via plugs on a laminated side of the MEMS device.
4. The semiconductor apparatus according to claim 1 , wherein the first lid and the second lid are made of glass.
5. The semiconductor apparatus according to claim 4 , wherein the first lid and the second lid are bonded to the silicon substrate by anodic bonding.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
August 29, 2007
November 9, 2010
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