A manufacturing method of the present invention includes a process using a first multi-tone mask, in which a first conductive layer in which a transparent conductive layer and a metal layer are stacked over a substrate, a gate electrode formed of a first conductive layer, and a pixel electrode formed of a single layer of the transparent conductive layer are formed, a process using a second multi-tone mask, in which a contact hole to the pixel electrode, and an island of an i-type semiconductor layer and an n+ type semiconductor layer are formed after a gate insulating film, the i-type semiconductor layer, and the n+ type semiconductor layer are formed, a process using a third photomask, in which a source electrode and a drain electrode are formed after a second conductive layer is formed, and a process using a fourth photomask, in which an opening region is formed after a protective film is deposited.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for manufacturing a semiconductor device, comprising: forming a first conductive layer in which a transparent conductive layer and a metal layer are stacked over an insulating substrate; forming a first resist using a first multi-tone mask; etching the transparent conductive layer and the metal layer using the first resist to form a gate electrode and a pixel region to be a pixel electrode; ashing the first resist so that a part of the first resist is left over the gate electrode; etching the metal layer over the pixel region using the first resist which is left to form the pixel electrode using the transparent conductive layer; forming a gate insulating film over the insulating substrate; forming a semiconductor layer over the gate insulating film; forming a semiconductor layer having an impurity element which imparts one conductivity type over the semiconductor layer; forming a second resist using a second multi-tone mask; etching the gate insulating film, the semiconductor layer, and the semiconductor layer having an impurity element which imparts one conductivity type over the pixel electrode to form a contact hole; ashing the second resist so that a part of the second resist is left over the gate electrode; etching the semiconductor layer and the semiconductor layer having an impurity element which imparts one conductivity using the second resist which is left to form an island-shaped semiconductor layer and an island-shaped semiconductor layer having an impurity element which imparts one conductivity type overlapped with the gate electrode; forming a second conductive layer over the insulating substrate; forming a third resist using a third mask; etching the second conductive layer using the third resist to form a source electrode and a drain electrode, and further etching the island-shaped semiconductor layer having an impurity element which imparts one conductivity type to form a source region and a drain region; forming a protective film over the insulating substrate; forming a fourth resist using a fourth mask to cover at least edge portions of the source region and at least edge portions of the drain region; and etching the gate insulating film and the protective film over the pixel electrode using the fourth resist so that the protective film is in a contact with the edge portions of the source region and the edge portions of the drain region.
2. The method for manufacturing a semiconductor device according to claim 1 , wherein a storage capacitor connected to the pixel electrode is included, an upper electrode of the storage capacitor is formed with a same material as a material of the source electrode and the drain electrode, and a lower electrode of the storage capacitor is formed with a same material as a material of the gate electrode.
3. A method for manufacturing a semiconductor device, comprising: forming a first conductive layer in which a transparent conductive layer and a metal layer are stacked over an insulating substrate; forming a first resist using a first multi-tone mask; etching the transparent conductive layer and the metal layer using the first resist to form a gate electrode and a pixel region to be a pixel electrode; ashing the first resist so that a part of the first resist is left over the gate electrode; etching the metal layer over the pixel region using the first resist which is left to form the pixel electrode formed of the transparent conductive layer; forming a gate insulating film over the insulating substrate; forming a semiconductor layer over the gate insulating film; forming a semiconductor layer having an impurity element which imparts one conductivity type over the semiconductor layer; forming a second resist using a second multi-tone mask; etching the gate insulating film, the semiconductor layer, and the semiconductor layer having an impurity element which imparts one conductivity type over the pixel electrode using the second resist to form a contact hole; ashing the second resist so that a part of the second resist is left over the gate electrode; etching the semiconductor layer and the semiconductor layer having an impurity element which imparts one conductivity type using the second resist which is left to form an island-shaped semiconductor layer and an island-shaped semiconductor layer having an impurity element which imparts one conductivity type overlapped with the gate electrode; forming a second conductive layer over the insulating substrate; forming a third resist using a third mask; etching the second conductive layer using the third resist to form a source electrode and a drain electrode, and further etching the semiconductor layer having an impurity element which imparts one conductivity type to form a source region and a drain region; forming a protective film over the insulating substrate; forming a fourth resist over the gate electrode, the source electrode, and the drain electrode by backside light exposure and changing a shape of the fourth resist to cover edge portions of the source electrode and the drain electrode by performing a reflow treatment on the fourth resist; and etching the gate insulating film and the protective film over the pixel electrode.
4. The method for manufacturing a semiconductor device according to claim 3 , wherein a storage capacitor connected to the pixel electrode is included, an upper electrode of the storage capacitor is formed with a same material as a material of the source electrode and the drain electrode, and a lower electrode of the storage capacitor is formed with a same material as a material of the gate electrode.
5. The method for manufacturing a semiconductor device according to claim 3 , wherein the fourth resist is formed on the protective film.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 20, 2008
November 30, 2010
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