An electronic component having an element body having at least one plane, and a terminal electrode to be electrically connected through an electroconductive particle to a circuit substrate. The terminal electrode is formed on the plane of the element body. When the plane of the element body is defined as a reference plane, a ratio of a projected area onto the reference plane of an external surface of the terminal electrode opposed to the circuit substrate in a region where a height of the terminal electrode from the reference plane is not less than a value resulting from subtraction of a diameter of the electroconductive particle from a maximum of the height, to a projected area onto the reference plane of the external surface of the terminal electrode opposed to the circuit substrate is set to be not less than 10%.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of producing an electronic component, comprising: a preparation step of preparing an element body having at least one plane; and a forming step of forming a terminal electrode to be electrically connected to a circuit substrate through an electroconductive particle, on the plane of the element body so that when the plane of the element body is defined as a reference plane, a ratio of a projected area onto the reference plane of an external surface of the terminal electrode opposed to the circuit substrate in a region where a height of the terminal electrode from the reference plane is not less than a value resulting from subtraction of a diameter of the electroconductive particle from a maximum of the height, to a projected area onto the reference plane of the external surface of the terminal electrode opposed to the circuit substrate is not less than 10%; wherein said forming step includes: an applying step of applying an electroconductive paste onto the plane of the element body; a planarizing step of planarizing an external surface of the applied electroconductive paste so that when the plane of the element body is defined as a reference plane, a ratio of a projected area onto the reference plane of the external surface opposed to the circuit substrate in a region where a height of the electroconductive paste from the reference plane is not less than a value resulting from subtraction of a diameter of the electroconductive particle from a maximum of the height, to a projected area onto the reference plane of the external surface of the electroconductive paste opposed to the circuit substrate is not less than 10%; and a baking step of baking the electroconductive paste planarized, wherein the preparation step comprises preparing an element body further having a plane opposed to said plane, as the element body, wherein the applying step comprises applying the electroconductive paste onto at least one plane out of said two planes, and wherein the planarizing step comprises pressing the electroconductive paste in directions normal to the reference plane while interposing the electroconductive paste between two metal plates arranged in parallel with the reference plane, thereby planarizing the external surface.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
March 8, 2007
February 15, 2011
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