A nonvolatile memory device, a method of fabricating the nonvolatile memory device and a processing system including the nonvolatile memory device. The nonvolatile memory device may include a plurality of internal electrodes that extend in a direction substantially perpendicular to a face of a substrate, a plurality of first external electrodes that extend substantially in parallel with the face of the substrate, and a plurality of second external electrodes that also extend substantially in parallel with the face of the substrate. Each first external electrode is on a first side of a respective one of the internal electrodes, and each second external electrode is on a second side of a respective one of the internal electrodes. These devices also include a plurality of variable resistors that contact the internal electrodes, the first external electrodes and the second external electrodes.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A nonvolatile memory device comprising: a plurality of internal electrodes extending in a direction substantially perpendicular to a face of a substrate; a plurality of first external electrodes extending substantially in parallel with the face of the substrate, wherein each first external electrode is on a first side of a respective one of the internal electrodes; a plurality of second external electrodes extending substantially in parallel with the face of the substrate, wherein each second external electrode is on a second side of a respective one of the internal electrodes; and a plurality of variable resistors, where each variable resistor contacts one of the internal electrodes, one of the first external electrodes and one of the second external electrodes.
2. The nonvolatile memory device of claim 1 , wherein the first external electrodes and the second external electrodes are arranged as a plurality of layers of external electrodes along the direction in which the internal electrodes extend.
3. The nonvolatile memory device of claim 1 , further comprising a plurality of selectors, wherein each of the selectors is configured to select one of the plurality of variable resistors.
4. The nonvolatile memory device of claim 1 , wherein: the first external electrodes are electrically connected to each other; and the second external electrodes are electrically connected to each other.
5. The nonvolatile memory device of claim 1 , further comprising: a plurality of active regions in the substrate; a plurality of wordlines extending in substantially the same direction as the first external electrodes and the second external electrodes; a plurality of bitlines extending in a direction substantially perpendicular to the first external electrodes and the second external electrodes; and a plurality of bitline contacts, each of which electrically connects a respective one of the bitlines to a portion of a respective one of the active regions that is between the wordlines, wherein two wordlines are connected to each of the active regions.
6. The nonvolatile memory device of claim 5 , wherein each of the active regions includes a first region extending in substantially the same direction as the bitlines and a second region protruding from the first region and extending in substantially the same direction as the wordlines.
7. The nonvolatile memory device of claim 6 , wherein: each of the internal electrodes is connected to either a first end of the first region or to a second end of the first region of a respective one of the active regions; and each bitline contact is connected to the second region of a respective one of the active regions.
8. The nonvolatile memory device of claim 5 , wherein the active regions form an acute angle with at least one of the wordlines and/or the bitlines.
9. The nonvolatile memory device of claim 1 , wherein the internal electrodes have a cylindrical-shaped cross-section or a prism-shaped cross-section.
10. The nonvolatile memory device of claim 9 , wherein the variable resistors cover external circumferential surfaces of the internal electrodes.
11. The nonvolatile memory device of claim 9 , wherein the variable resistors are located in areas where the internal electrodes and the first external electrode overlap and in areas where the internal electrodes and the second external electrodes overlap.
12. The nonvolatile memory device of claim 9 , wherein the variable resistors comprise chalcogenide, a transition metal oxide, a perovskite oxide, and/or a solid electrolyte material containing metal ions.
13. A nonvolatile memory device comprising: a plurality of internal electrodes extending in a direction substantially perpendicular to a face of a substrate; a plurality of third external electrodes and a plurality of fourth external electrodes both extending substantially in parallel with the face of the substrate, disposed on at least one side of the internal electrodes, the third external electrodes and the fourth external electrodes overlapping each other in the direction in which the internal electrodes extend; and a plurality of variable resistors contacting the internal electrodes, the third external electrodes and the fourth external electrodes.
14. The nonvolatile memory device of claim 13 , wherein: the third external electrodes and the fourth external electrodes are disposed on both sides of the internal electrodes and intersect the internal electrodes; and the nonvolatile memory device further comprises a plurality of active regions in the substrate, a plurality of wordlines extending substantially in the same direction as the third external electrodes and the fourth external electrodes, and a plurality of bitlines extending in a direction substantially perpendicular to the first external electrodes and the second external electrodes and being connected to parts of the active regions between the wordlines wherein two wordlines are connected to each of the active regions.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
January 14, 2009
May 31, 2011
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