A CMOS imager is integrated on a single substrate along with logic and support circuitry for decoding and processing optical information received by the CMOS imager. Integrating a CMOS imager and peripheral circuitry allows for a single chip image sensing device.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A CMOS image sensor comprising: an array of active pixels disposed on a semiconductor substrate, each active pixel of the array comprising a respective photodiode, the array to provide signals associated with an image focused on the array; a controller disposed on the semiconductor substrate and coupled to the array to provide correlated double-sampling of signals associated with the image; an analog-to-digital converter disposed on the semiconductor substrate and coupled to the array to convert analog signals associated with the image into digital signals associated with the image; a digital-to-analog converter disposed on the semiconductor substrate and coupled to the analog-to-digital converter; and a layer of material disposed over the array, the controller, the analog-to-digital converter, and the digital-to-analog converter, wherein the layer of material is patterned over the array and the layer of material is unpatterned over regions outside the array to primarily block light from the regions outside the array.
2. The image sensor of claim 1 , wherein the layer of material is a metal.
3. The image sensor of claim 1 , wherein the layer of material is opaque.
4. The image sensor of claim 1 , the layer of material is unpatterned over the controller, the analog-to-digital converter, and the digital-to-analog converter.
5. The image sensor of claim 1 , wherein the layer of material is patterned over the array such that the layer of material blocks a portion of light from the array while passing a portion of light to the array.
6. The image sensor of claim 1 , wherein the layer of material is patterned over the array such that more light is blocked from array than would otherwise be passed to the array in an absence of the layer of material, but less light is blocked from the array than is blocked by an unpatterned layer of material over regions outside the array.
7. The image sensor of claim 1 , wherein the layer of material blocks light in between pixels of the array.
8. The image sensor of claim 1 , wherein further comprising non-volatile memory to store the digital signals.
9. The image sensor of claim 1 , wherein further comprising a JPEG compression circuit to perform JPEG compression on the digital signals.
10. The image sensor of claim 1 , wherein an input of the digital-to-analog converter is coupled to an output of the analog-to-digital converter.
11. An imaging system, comprising: a lens to focus an image onto a monolithic CMOS device; a first area of the device where the image is to be focused, wherein the first area comprises a material configured in a regular pattern above an array of active pixels, the array to convert the image into analog signals; and a second area of the device, outside the first area, wherein the second area comprises the material configured in an unpatterned state primarily to block light incident on the device outside the first area and above an analog-to-digital converter coupled to the array to convert the analog signals into digital signals and a digital-to-analog converter coupled to the analog-to-digital converter.
12. The image sensor of claim 11 , wherein the material is a metal.
13. The image sensor of claim 11 , wherein the material is opaque.
14. The image sensor of claim 11 , wherein the regular pattern of the material in the first area above the array is to intentionally pass a portion of light from the image to the array.
15. The image sensor of claim 11 , wherein the regular pattern is to block light in between pixels of the array.
16. The image sensor of claim 11 , wherein the material configured in the unpatterned state further resides above a JPEG compression circuit.
17. The image sensor of claim 11 , wherein an input of the digital-to-analog converter is coupled to an output of the analog-to-digital converter.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 31, 2009
May 31, 2011
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