Apparatus and method for video de-interlace

1. A video de-interlace apparatus, comprising: a combing detection apparatus, for receiving a plurality of successive fields, performing combing detection to the fields and outputting a combing detection result wherein the successive fields comprise odd fields and even fields, the combing detection apparatus comprises: a motion detection apparatus, for receiving the successive fields for determining whether there is motion between adjacent odd and even fields among the successive fields, wherein each of the fields comprises a plurality of pixels respectively denoted as P(x, y), and (x, y) represents a position of the pixel in the field, the motion detection apparatus comprises: a motion calculation apparatus, for receiving pixel P(x, y) of the i th field, pixel P(x, y+1) of the i th field, pixel P(x, y) of the (i+1) th field, pixel P(x, y+1) of the (i+1) th field, pixel P(x, y) of the (i+2) th field, and pixel P(x, y+1) of the (i+2) th field, adding the difference between pixel P(x, y) of the (i+2) th field and pixel P(x, y) of the (i+1) th field to the difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field as a first sum, adding the difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y+1) of the (i+1) th field to the difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field as a second sum, and adding the difference between pixel P(x, y) of the (i+2) th field and P(x, y) of the i th field to the difference between pixel P(x, y+1) of the (i+2) th field and P(x, y+1) of the i th field as a third sum, wherein i is a natural number and 0≦i≦the number of the fields; a motion determination apparatus, for receiving the first, the second and the third sum, outputting an even pixel movement signal and an odd pixel movement signal, enabling the even pixel movement signal when the first sum and the third sum are greater than or equal to a first predetermined value, and enabling the odd pixel movement signal when the second sum and the third sum are greater than or equal to the first predetermined value; and a combing detector, for counting a combing number of a specific odd field and a specific even field when the motion detection apparatus determines there is motion between the specific odd field and the specific even field neighboring with the specific odd field among the successive fields; and a de-interlace format determining apparatus, for receiving the combing detection result and comparing the combing detection result with a plurality of models, when the combing detection result conforms to a specific model among the models, the de-interlace format determining apparatus determines a specific de-interlace format corresponding to the specific model to de-interlace the fields.

2. The video de-interlace apparatus as claimed in claim 1 , wherein the motion calculation apparatus comprises: a first subtractor, for performing subtraction to pixel P(x, y) of the (i+2) th field and pixel P(x, y) of the (i+1) th field, and outputting a first difference; a second subtractor, for performing subtraction to pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field, and outputting a second difference; a third subtractor, for performing subtraction to pixel P(x, y+1) of the (i+2) th field and pixel P(x, y+1) of the (i+1) th field, and outputting a third difference; a fourth subtractor, for performing subtraction to pixel P(x, y) of the (i+2) th field and pixel P(x, y) of the i th field, and outputting a fourth difference; a fifth subtractor, for performing subtraction to pixel P(x, y+1) of the (i+2) th field and pixel P(x, y+1) of the i th field, and outputting a fifth difference; a first adder, coupled to the first subtractor and the second subtractor for receiving the first difference and the second difference, wherein the first adder adds the first difference to the second difference and outputs the first sum; a second adder, coupled to the second subtractor and the third subtractor for receiving the second difference and the third difference, wherein the second adder adds the second difference to the third difference and outputs the second sum; and a third adder, coupled to the fourth subtractor and the fifth subtractor for receiving the fourth difference and the fifth difference, wherein the third adder adds the fourth difference to the fifth difference and outputs the third sum.

3. The video de-interlace apparatus as claimed in claim 2 , wherein the third, the fourth, and the fifth adder further perform low-pass calculations.

4. The video de-interlace apparatus as claimed in claim 1 , wherein the motion determination apparatus comprises: a first comparator, for receiving the first sum and the first predetermined value, and outputting a first determination signal, wherein the first comparator enables the first determination signal when the first sum is greater than or equal to the first predetermined value; a second comparator, for receiving the second sum and the first predetermined value, and outputting a second determination signal, wherein the second comparator enables the second determination signal when the second sum is greater than or equal to the first predetermined value; a third comparator, for receiving the third sum and the first predetermined value, and outputting a third determination signal, wherein the third comparator enables the third determination signal when the third sum is greater than or equal to the first predetermined value; a first logic circuit, coupled to the first and the third comparator, receiving the first and the third determination signal, and outputting the even pixel movement signal, wherein the first logic circuit enables the even pixel movement signal when both the first and the third determination signal are enabled; and a second logic circuit, coupled to the second and the third comparator, for receiving the second and the third determination signal, and outputting the odd pixel movement signal, wherein the second logic circuit enables the odd pixel movement signal when both the second and the third determination signal are enabled.

5. The video de-interlace apparatus as claimed in claim 1 , wherein the combing detector comprises: a combing determination apparatus, for receiving pixel P(x, y) of the (i+1) th field pixel P(x, y+1) of the (i+1) th field pixel P(x, y) of the (i+2) th field, and pixel P(x, y+1) of the (i+2) th field, wherein the combing determination apparatus outputs and enables a first comparison signal when the difference between pixel P(x, y) of the (i+2) th field and pixel P(x, y) of the (i+1) th field are greater than or equal to a second predetermined value, wherein the combing determination apparatus outputs and enables a second comparison signal when the difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field are greater than or equal to the second predetermined value, wherein the combing determination apparatus outputs and enables a third comparison signal when the difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y+1) of the (i+1) th field are greater than or equal to the second predetermined value, and wherein i is a natural number and 0≦i≦the number of the fields; a combing calculation apparatus, coupled to the combing determination apparatus and the motion determination apparatus, for receiving the first comparison signal, the second comparison signal, the third comparison signal, the odd pixel movement signal and the even pixel movement signal, and determining whether there is combing in pixel P(x, y) of the (i+1) th field, pixel P(x, y+1) of the (i+1) th field, pixel P(x, y) of the (i+2) th field, and pixel P(x, y+1) of the (i+2) th field according to the received signals, wherein the combing calculation apparatus adds a predetermined value to a combing accumulation as the combing accumulation when there is combing, wherein the combing calculation apparatus outputs the combing accumulation after all the pixels in the (i+1) th frame and the (i+2) th frame have been processed; and a combing accumulation record buffer, coupled to the combing calculation apparatus, for receiving the combing accumulation and storing the combing accumulation corresponding to every K successive fields, wherein K is nature number.

6. The video de-interlace apparatus as claimed in claim 5 , wherein the combing determination apparatus comprises: a sixth subtractor, for performing subtraction to pixel P(x, y) of the (i+2) th field and pixel P(x, y) of the (i+1) th field, and outputting a sixth difference; a seventh subtractor, for performing subtraction to pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field, and outputting a seventh difference; a eighth subtractor, for performing subtraction to pixel P(x, y+1) of the (i+2) th field and pixel P(x, y+1) of the (i+1) th field, and outputting an eighth difference; a fourth comparator, for comparing the sixth difference and the second predetermined value, and outputting the first comparison signal, wherein the fourth comparator enables the first comparison signal when the sixth difference is greater than or equal to the second predetermined value; a fifth comparator, for comparing the seventh difference and the second predetermined value, and outputting the second comparison signal, wherein the fifth comparator enables the second comparison signal when the seventh difference is greater than or equal to the second predetermined value; and a sixth comparator, for comparing the eighth difference and the second predetermined value, and outputting the third comparison signal, wherein the sixth comparator enables the third comparison signal when the eighth difference is greater than or equal to the second predetermined value.

7. The video de-interlace apparatus as claimed in claim 6 , wherein the combing determination apparatus further comprises: a combing checking apparatus, for receiving the sixth, the seventh, and the eighth difference, comparing the difference between pixel P(x−1, y) of the (i+2) th field and pixel P(x−1, y) of the (i+1) th field with the sixth difference, comparing the difference between pixel P(x−1, y+1) of the (i+2) th field and pixel P(x−1, y) of the (i+1) th field with the seventh difference, comparing the difference between pixel P(x−1, y+1) of the (i+2) th field and pixel P(x−1, y+1) of the (i+1) th field with the eighth difference, and outputting a first and a second combing determination signal, wherein the combing calculation apparatus is coupled to the combing checking apparatus for receiving the first comparison signal, the second comparison signal, the third comparison signal, the odd pixel movement signal, the even pixel movement signal, the first combing determination signal, and the second combing determination signal, and determining whether there is combing in pixel P(x, y) of the (i+1) th field, pixel P(x, y+1) of the (i+1) th field, pixel P(x, y) of the (i+2) th field, and pixel P(x, y+1) of the (i+2) th field according to the received signals.

8. The video de-interlace apparatus as claimed in claim 7 , wherein the combing checking apparatus comprises: a first combing type checker, for receiving the sixth and the seventh difference for determining the combing type of pixel P(x, y), pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field; a second combing type checker, for receiving the seventh and the eighth difference for determining the combing type of pixel P(x, y), P(x, y+1) of the (i+1) th field and pixel P(x, y+1) of the (i+2) th field; a first combing type register, storing the combing type of pixel P(x−1, y), pixel P(x−1, y+1) of the (i+2) th field and pixel P(x−1, y) of the (i+1) th field; a second combing type register, for storing the combing type of pixel P(x−1, y), pixel P(x−1, y+1) of the (i+1) th field and pixel P(x−1, y+1) of the (i+2) th field; a first combing type comparator, coupled to the first combing type checker and the first combing type register for comparing the combing type of pixel P(x, y), pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field with the combing type of pixel P(x−1, y), pixel P(x−1, y+1) of the (i+2) th field and pixel P(x−1, y) of the (i+1) th field, wherein the first combing type comparator outputs and enables the first combing determination signal when the two combing types is the same; and a second combing type comparator, coupled to the second combing type checker and the second combing type register for comparing the combing type of pixel P(x, y), pixel P(x, y+1) of the (i+1) th field and pixel P(x, y+1) of the (i+2) th field with the combing type of pixel P(x−1, y), pixel P(x−1, y+1) of the (i+1) th field and pixel P(x−1, y+1) of the (i+2) th field, wherein the second combing type comparator outputs and enables the second combing determination signal when the two combing types is the same.

9. The video de-interlace apparatus as claimed in claim 5 , wherein the combing calculation apparatus comprises: a first logic gate, for receiving the odd pixel movement signal, the first comparison signal and the second comparison signal, and outputting a first logic signal, wherein the first logic signal is in a first logic state when the odd pixel movement signal, the first comparison signal and the second comparison signal are enabled; a second logic gate, for receiving the even pixel movement signal, the second comparison signal and the third comparison signal, and outputting a second logic signal, wherein the second logic signal is in the first logic state when the even pixel movement signal, the second comparison signal and the third comparison signal are enabled; a delay circuit, coupled to the second logic gate, for receiving the second logic signal and outputting a second delayed logic signal after delaying the second logic signal for a predetermined time; a third logic gate, coupled to the first logic gate and the delay circuit, for receiving the first logic signal and the second delayed logic signal, and outputting a third logic signal, wherein the third logic gate sets the third logic signal to the first logic state when both the first logic signal and the second delayed logic signal are in the first logic state; a fourth logic gate, coupled to the first and the second logic gate, for receiving the first and the second logic signal, and outputting a fourth logic signal, wherein the fourth logic gate sets the fourth logic signal to the first logic state when both the first and the second logic signal are in the first logic state; and an accumulator, coupled to the third and the fourth logic gate, for receiving the third and the fourth logic signal, wherein the accumulator adds the predetermined value to the combing accumulation to serve as the combing accumulation when one of the third and the fourth logic signal is in the first logic state, and the accumulator adds two times of the predetermined value to the combing accumulation as the combing accumulation when both the third and the fourth logic signal are in the first logic state.

10. The video de-interlace apparatus as claimed in claim 5 , wherein the combing calculation apparatus comprises: a first logic gate, for receiving the odd pixel movement signal, the first comparison signal and the second comparison signal, and outputting a first logic signal, wherein the first logic signal is in a first logic state when the odd pixel movement signal, the first comparison signal and the second comparison signal are enabled; a second logic gate, for receiving the even pixel movement signal, the second comparison signal and the third comparison signal, and outputting a second logic signal, wherein the second logic signal is in the first logic state when the even pixel movement signal, the second comparison signal and the third comparison signal are enabled; a delay circuit, coupled to the second logic gate, for receiving the second logic signal and outputting a second delayed logic signal after delaying the second logic signal for a predetermined time; a third logic gate, coupled to the first logic gate and the delay circuit, for receiving the first logic signal and the second delayed logic signal, and outputting a third logic signal, wherein the third logic gate sets the third logic signal to the first logic state when both the first logic signal and the second delayed logic signal are in the first logic state; a fourth logic gate, coupled to the first and the second logic gate, for receiving the first and the second logic signal, and outputting a fourth logic signal, wherein the fourth logic gate sets the fourth logic signal to the first logic state when both the first and the second logic signal are in the first logic state; and a combing cluster recorder, coupled to the third and the fourth logic gate, receiving and recording the third and the fourth logic signal, and counting the number of the third logic signal and the fourth logic signal being in the first logic state within pixels P(x, y)˜P(x−k, y−k), wherein the combing cluster recorder adds the number to the combing accumulation as the combing accumulation when the number is greater than a cluster predetermined value and outputs the combing accumulation after all the pixels in the (i+1) th frame and the (i+2) th frame have been processed, wherein k is a natural number and k≦x, k≦y.

11. The video de-interlace apparatus as claimed in claim 1 , wherein the combing detection result comprises m combing accumulations, wherein the i th combing accumulation corresponds to the combing number in the i th field and the (i+1) th field, and wherein in and i are natural numbers and m>i, the de-interlace format determining apparatus comprises: a film model detector, receiving m combing accumulations and comparing the m combing accumulations with a plurality of built-in film models, wherein when the m combing accumulations conforms to a specific model among the film models, the film model detector determines a specific de-interlace format corresponding to the specific model to de-interlace the fields.

12. The video de-interlace apparatus as claimed in claim 11 , wherein the film model detector comprises: a 2:2 film model detector, comprising: a plurality of 2:2 film model comparators, each 2:2 film model comparator comprising one of a plurality of 2:2 film models, for receiving the m combing accumulations and respectively outputting “match”, “mismatch”, and “unsure” signals according to whether or not the m combing accumulations match the 2:2 film models of the 2:2 film model comparators; a 2:2 film status detector, coupled to the 2:2 film model comparators, for outputting a specific 2:2 match signal and a specific 2:2 countermeasure signal corresponding to the 2:2 film model in a specific 2:2 film model comparator when the number of “match signals output by the specific 2:2 film model comparator are greater than a third predetermined value according to the “match”, “mismatch”, and “unsure” signal output by each of the 2:2 film model comparators; and a 3:2 film model detector, comprising: a plurality of 3:2 film model comparators, each 3:2 film model comparator comprising one of a plurality of 3:2 film models, for receiving the m combing accumulations and respectively outputting “match”, “mismatch”, and “unsure” signals according to whether or not the m combing accumulations match the 3:2 film models of the 3:2 film model comparators; a 3:2 film status detector, coupled to the 3:2 film model comparators, for outputting a specific 3:2 match signal and a specific 3:2 countermeasure signal corresponding to the 3:2 film model in a specific 3:2 film model comparator when a number of “match” signals output by the specific 3:2 film model comparator are greater than a third predetermined value according to the “match”, “mismatch”, and “unsure” signal output by each of the 3:2 film model comparators; and a de-interlace format decision maker, for receiving the specific 2:2 match signal, the specific 2:2 countermeasure signal, the specific 3:2 match signal and the specific 3:2 countermeasure signal, and determining a specific de-interlace format according to the received signals for de-interlacing the successive fields.

13. The video de-interlace apparatus as claimed in claim 12 , wherein the de-interlace format decision maker comprises: a format decision maker, coupled to the 2:2 film status detector and the 3:2 film status detector, for receiving the specific 2:2 match signal and the specific 3:2 match signal, and comparing the received signals with previously inputted the specific 2:2 match signal and the specific 3:2 match signal inputted to output a format decision signal; and a decision selector, coupled to the 2:2 film status detector and the 3:2 film status detector, for receiving the specific 2:2 countermeasure signal, the specific 3:2 countermeasure signal, and the format decision signal, and determining the specific de-interlace format among a plurality of de-interlace formats according to the received signals for de-interlacing the fields.

14. The video de-interlace apparatus as claimed in claim 13 , wherein the de-interlace format decision maker further comprises: a film scene change detector, coupled to the format decision maker, for receiving the format decision signal and determining whether there is scene change according to the previously received format decision signal and the format decision signal, wherein the film scene change detector outputs and enables a film scene change signal when there is scene change, wherein, when the film scene change signal is enabled, the film model detector and the decision selector are reset and receive another m combing accumulation to determine the de-interlace format for the successive fields.

15. The video de-interlace apparatus as claimed in claim 11 , wherein the de-interlace format determining apparatus further comprises: a scene change detector, receiving m combing accumulations, for determining whether there is scene change according to the m combing accumulations, wherein the scene change detector outputs and enables a scene change signal when there is scene change, and wherein the film format detector is reset and receives another m combing accumulation to determine the de-interlace format for the successive fields when the scene change signal is enabled.

16. A video de-interlace method, comprising: providing a plurality of successive fields; performing combing detection to the fields to obtain a combing detection result wherein the successive fields comprise odd fields and even fields, and the steps of the combing detection comprises: (a) determining whether there is motion between adjacent odd and even fields among the successive fields, wherein, each of the fields comprises a plurality of pixels respectively denoted as P(x, y), wherein (x, y) represents the position of the pixel in the field, and step (a) comprises: receiving pixel P(x, y) of the i th field, pixel P(x, y+1) of the i th field, pixel P(x, y) of the (i+1) th field, pixel P(x, y+1) of the (i+1) th field, pixel P(x, y) of the (i+2) th field, and pixel P(x, y+1) of the (i+2) field; adding a difference between pixel P(x, y) of the (i+2) th field and pixel P(x, y) of the (i+1) th field to a difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field as a first sum; adding a difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y+1) of the (i+1) th field to a difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field as a second sum; adding a difference between pixel P(x, y) of the (i+2) th field and pixel P(x, y) of the i th field to a difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y+1) of the i th field as a third sum, wherein i is a natural number and 0<=i<=the number of the fields; and determining an even pixel movement, when the second and the third sum being greater than or equal to the first predetermined value, determining an odd pixel movement when the first and the third sum are greater than or equal to a first predetermined value; (b) counting a combing number of a specific odd field and a specific even field when the motion detection apparatus determines there is motion between the specific odd field and the specific even field neighboring with the specific odd field among the successive fields; and repeating the foregoing operation m times to obtain m combing numbers, wherein m is a natural number; comparing the combing detection result with a plurality of models; and determining a specific de-interlace format corresponding to a specific model for de-interlacing the fields when the combing detection result conforms to the specific model among the models.

17. The video de-interlace method as claimed in claim 16 , wherein step b comprises: adding a predetermined value to a combing accumulation as the combing accumulation when the difference between pixel P(x, y) of the (i+2) th field and pixel P(x, y) of the (i+1) th field being greater than or equal to a second predetermined value and the difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field are greater than or equal to the second predetermined value and odd pixel movement; adding the predetermined value to the combing accumulation as the combing accumulation when the difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field being greater than or equal to the second predetermined value and the difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y+1) of the (i+1) th field being greater than or equal to the second predetermined value and even pixel movement; and serving the combing accumulation as the combing number after all the pixels in the (i+1) th frame and the (i+2) th frame have been processed.

18. The video de-interlace method as claimed in claim 17 , wherein when the difference between pixel P(x, y) of the (i+2) th field and pixel P(x, y) of the (i+1) field are greater than or equal to a second predetermined value and the difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field are greater than or equal to the second predetermined value, odd pixel movement includes: adding the predetermined value to the combing accumulation as the combing accumulation when the combing type of pixel P(x, y), pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field is the same as the combing type of pixel P(x−1, y), pixel P(x−1, y+1) of the (i+2) th field and pixel P(x−1, y) of the (i+1) th field.

19. The video de-interlace method as claimed in claim 17 , wherein when the difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y) of the (i+1) th field are greater than or equal to the second predetermined value and the difference between pixel P(x, y+1) of the (i+2) th field and pixel P(x, y+1) of the (i+1) th field are greater than or equal to the second predetermined value, even pixel movement includes: adding the predetermined value to the combing accumulation as the combing accumulation when the combing type of pixel P(x, y), pixel P(x, y+1) of the (i+1) th field and pixel P(x, y+1) of the (i+1) th field is the same as the combing type of pixel P(x−1, y), pixel P(x−1, y+1) of the (i+2) th field and pixel P(x−1, y+1) of the (i+1) th field.

20. The video de-interlace method as claimed in claim 16 , wherein the step of respectively comparing the combing detection result with a plurality of models comprises: comparing m combing numbers with a plurality of 2:2 film models; and comparing m combing numbers with a plurality of 3:2 film models.

21. The video de-interlace method as claimed in claim 16 , wherein the specific de-interlace format comprises BOB, forward weave, and backward weave.