A method for fabricating semiconductor devices, e.g., SONOS cell. The method includes providing a semiconductor substrate (e.g., silicon wafer, silicon on insulator) having a surface region, which has a native oxide layer. The method includes treating the surface region to a wet cleaning process to remove a native oxide layer from the surface region. In a specific embodiment, the method includes subjecting the surface region to an oxygen bearing environment and subjecting the surface region to a high energy electromagnetic radiation having wavelengths ranging from about 300 to about 800 nanometers for a time period of less than 10 milli-seconds to increase a temperature of the surface region to greater than 1000 Degrees Celsius. In a specific embodiment, the method causes formation of an oxide layer having a thickness of less than 10 Angstroms. In a preferred embodiment, the oxide layer is substantially free from pinholes and other imperfections. In a specific embodiment, the oxide layer is a gate oxide layer.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for fabricating semiconductor devices, the method comprising: providing a semiconductor substrate having a surface region, the surface region having a native oxide layer; treating the surface region to a wet cleaning process to remove a native oxide layer from the surface region; subjecting the surface region to an oxygen species bearing environment; subjecting the surface region to an electromagnetic radiation having wavelengths ranging from about 300 to about 800 nanometers for a time period of less than 10 milli-seconds to increase a temperature of the surface region to greater than 1000 Degrees Celsius; causing formation of an oxide layer having a thickness of less than 10 Angstroms, the oxide layer being substantially free from pinholes and imperfections, and further comprising removing the electromagnetic radiation to cause a reduction in temperature of about 300 to about 600 Degrees Celsius in a time of about 1 second and less.
2. The method of claim 1 wherein the oxide layer is a gate oxide layer.
3. The method of claim 1 wherein the oxide layer is an interface layer.
4. The method of claim 1 wherein the oxide layer is provided for an oxide on nitride on oxide structure for a SONOS device.
5. The method of claim 1 wherein the oxygen species is mixed with a nitrogen species.
6. The method of claim 1 wherein the oxygen species is mixed with an argon species to form substantially pure silicon dioxide.
7. The method of claim 1 wherein the semiconductor substrate is a silicon wafer.
8. The method of claim 1 wherein the oxide layer is for a device having a design rule of about 45 nanometers and less.
9. The method of claim 1 wherein the surface region is characterized by a depth of less than three microns.
10. A method for fabricating semiconductor devices, the method comprising: providing a semiconductor substrate having a surface region, the surface region having a native oxide layer; treating the surface region to a wet cleaning process to remove a native oxide layer from the surface region; subjecting the surface region to an oxygen species bearing environment; subjecting the surface region to an electromagnetic radiation having wavelengths ranging from about 300 to about 800 nanometers for a time period of less than 10 milli-seconds to increase a temperature of the surface region to greater than 1000 Degrees Celsius; causing formation of an oxide layer having a thickness of less than 10 Angstroms, the oxide layer being substantially free from pinholes and imperfections; removing the electromagnetic radiation to cause a reduction in temperature of about 300 to about 600 Degrees Celsius in a time of about 1 second and less; forming a nitride layer overlying the oxide layer; forming an oxide layer overlying the nitride layer to provide an oxide on nitride on oxide stack structure; and forming a gate structure overlying the oxide on nitride on oxide stack structure.
11. The method of claim 10 wherein the oxide layer is a gate oxide layer.
12. The method of claim 10 wherein the oxide layer is an interface layer.
13. The method of claim 10 wherein the oxide on nitride on oxide structure for a SONOS device.
14. The method of claim 10 wherein the oxygen species is mixed with a nitrogen species.
15. The method of claim 10 wherein the oxygen species is mixed with an argon species to form substantially pure silicon dioxide.
16. The method of claim 10 wherein the semiconductor substrate is a silicon wafer.
17. The method of claim 10 wherein the oxide layer is for a device having a design rule of about 45 nanometers and less.
18. The method of claim 10 wherein the surface region has a depth of less than three microns.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 27, 2008
August 2, 2011
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.