An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level states, in response to information to be stored in the one memory cell, and reading the status of the memory cell to determine whether the read out status corresponds to one of the first to fourth level states by utilizing a first reference level set between the second and third level states, a second reference level set between the first and second level states and a third reference level set between the third and fourth level states.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A nonvolatile memory apparatus comprising: a control unit; and a nonvolatile memory including a plurality of memory cells, and two buffers, wherein each of the memory cells has a threshold voltage in one of plural voltage ranges, one of which indicates an erase status, and the others of which indicate different program status, wherein a first buffer of the two buffers is configured to be used for reading or programming for a first page, and a second buffer of the two buffers is configured to be used for reading or programming for a second page, wherein, when data is programmed into one page of the first page and the second page, the threshold voltage of the memory cell to be programmed is moved into or kept as one of two voltage ranges, wherein, when data is programmed into both pages of the first page and the second page, the threshold voltage of the memory cell to be programmed is moved into or kept as one of four voltage ranges, and wherein a first memory cell to be programmed is configured to be used for storing information indicating whether one or both pages of the first page and the second page are programmed.
2. A nonvolatile memory apparatus according to claim 1 , wherein, after data is programmed into one page, the nonvolatile memory is capable of programming data to the other page, the threshold voltage of the memory cell to be programmed is moved into or kept as one of the four voltage ranges, and wherein changed information is provided to the first memory cell to be programmed, wherein said changed information indicates that both pages of the first page and the second page are programmed.
3. A nonvolatile memory apparatus according to claim 2 , wherein the information stored in the first memory cell is configured to be used when performing a reading data operation from the nonvolatile memory cell.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 1, 2011
September 20, 2011
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