In a high frequency flip chip package process of a polymer substrate and a structure thereof, the structure is a one-layer structure packaged by a high frequency flip chip package process to overcome the shortcomings of a conventional two-layer structure packaged by the high frequency flip chip package process. The conventional structure not only incurs additional insertion loss and return loss in its high frequency characteristic, but also brings out a reliability issue. Thus, the manufacturing process of a ceramic substrate in the conventional structure still has the disadvantages of a poor yield rate and a high cost.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A high frequency flip chip package process of a polymer substrate, comprising: depositing a first predetermined thickness of titanium onto a polymer substrate as an adhesion layer, and depositing a second predetermined thickness of gold onto the adhesion layer as a seed layer, and coating a third predetermined thickness of photoresist layer, and post-exposure baking the photoresist, and then reacting the polymer substrate with a developer solution and submerging the polymer substrate in an electroplating solution while connecting the polymer substrate with a current to form a coplanar waveguide transmission line; coating another photoresist on the coplanar waveguide transmission line to form a gold bump, and electroplating the gold bump by an electroplating solution to form at least one bump; using a solution to remove the photoresist and the seed layer; adhere a chip onto the bump; heating the polymer substrate, and filling in a under-fill into a space formed between the chip and the polymer substrate and the bump; and heating the polymer substrate, while sealing the top of the chip to complete the high frequency flip chip package process.
2. The high frequency flip chip package process of a polymer substrate as recited in claim 1 , wherein the polymer substrate is a polymer board used for high frequency.
3. The high frequency flip chip package process of a polymer substrate as recited in claim 1 , wherein the first predetermined thickness is equal to 500 Å.
4. The high frequency flip chip package process of a polymer substrate as recited in claim 1 , wherein the second predetermined thickness is equal to 2000 Å.
5. The high frequency flip chip package process of a polymer substrate as recited in claim 1 , wherein the third predetermined thickness is equal to 2˜3 μm.
6. The high frequency flip chip package process of a polymer substrate as recited in claim 1 , wherein the electroplating solution contains a gold cyanide electroplating solution.
7. The high frequency flip chip package process of a polymer substrate as recited in claim 1 , wherein the under-fill is a polymer selected from the collection of epoxy-based benzocyclobutene, liquid crystal polymer and high frequency under-fill.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
August 26, 2009
October 11, 2011
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