A media processing system and device with improved power usage characteristics, improved audio functionality and improved media security is provided. Embodiments of the media processing system include an audio processing subsystem that operates independently of the host processor for long periods of time, allowing the host processor to enter a low power state. Other aspects of the media processing system provide for enhanced audio effects such as mixing stored audio samples into real-time telephone audio. Still other aspects of the media processing system provide for improved media security due to the isolation of decrypted audio data from the host processor.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An electronic device, comprising: a host subsystem comprising a main bus coupled to a first plurality of components comprising a host processor, a memory controller, and a memory device; and a media processing subsystem separate from the host subsystem and comprising: a second plurality of components comprising a digital signal processor and an audio output device; an audio bus coupled to the second plurality of components; a subsystem interface configured to loosely couple the media processing subsystem to the main bus of the host subsystem, such that the second plurality of components are inaccessible by the host processor and the second plurality of components are unable to access the main bus of the host subsystem; and wherein the host processor is configured to issue an instruction to the memory controller to cause a segment of audio data stored in the memory device to be provided to the main bus, wherein the subsystem interface is configured to transfer the audio data from the main bus to the audio bus, and wherein the digital signal processor is configured to process the audio data received via the audio bus and to route the audio data to the audio output device.
2. The electronic device of claim 1 , wherein the media processing subsystem is configured to process the audio data and the host subsystem is configured to process video data.
3. The electronic device of claim 2 , comprising a timekeeping interface configured to provide time-related information to both the host subsystem and the media processing subsystem, wherein the time-related information is used to synchronize the audio data with the video data.
4. The electronic device of claim 1 , wherein at least part of the host subsystem is configured to enter a low power mode while the media processing subsystem is processing the audio data.
5. The electronic device of claim 1 , wherein the media processing subsystem comprises a telephone communications device coupled to the digital signal processor, wherein the digital signal processor is configured to route telephone audio data between the telephone communications device and the audio output device.
6. The electronic device of claim 5 , wherein at least part of the host subsystem is configured to enter a low power mode while the media processing subsystem is processing the telephone audio data.
7. The electronic device of claim 5 , wherein the digital signal processor is configured to mix telephone audio with audio samples received via the subsystem interface.
8. The electronic device of claim 1 , wherein the memory controller of the host subsystem comprises a DMA controller, wherein the DMA controller is configured to route the audio data from the host subsystem to the subsystem interface.
9. The electronic device of claim 8 , wherein the DMA controller is configured to decrypt the audio data.
10. The electronic device of claim 8 , wherein at least part of the host subsystem is configured to enter a low power mode after causing the DMA controller to conduct a DMA transfer.
11. The electronic device of claim 1 , comprising an initialization path that allows the transmission of a trusted program code from the host subsystem to the media processing subsystem, the initialization path configured to be inoperable after the transmission of the trusted program code.
12. The electronic device of claim 1 , wherein the electronic device comprises a handheld electronic device.
13. The electronic device of claim 1 , wherein the electronic device comprises a cellular telephone, a portable media player, a personal data organizer, or a computer, or some combination thereof.
14. The electronic device of claim 1 , wherein the audio data comprises music data.
15. A system comprising: a host subsystem comprising a main bus and a first plurality of components comprising a host processor, a memory controller, and a memory device, wherein each of the first plurality of components is coupled to the main bus; and an audio processing subsystem separate from the host subsystem and comprising: a second plurality of components comprising a digital signal processor and an audio output device; an audio bus coupled to the second plurality of components; a subsystem interface configured to loosely couple the audio processing subsystem to the main bus of the host subsystem, such that the second plurality of components are inaccessible by the host processor and the second plurality of components are unable to access the main bus of the host subsystem; and wherein the host processor is configured to issue an instruction to the memory controller to cause a segment of audio data stored in the memory device to be provided to the main bus, wherein the subsystem interface is configured to transfer the audio data from the main bus to the audio bus, and wherein the digital signal processor is configured to process the audio data received via the audio bus and to route the audio data to the audio output device.
16. The system of claim 15 , comprising a baseband radio coupled to the audio processing subsystem and being configured to transmit and receive telephone audio data.
17. The system of claim 16 , wherein the digital signal processor is configured to route the telephone audio data between the baseband radio and an audio input/output device.
18. The system of claim 15 , wherein at least part of the host subsystem is configured to enter a low power mode while the audio processing subsystem is processing the audio data.
19. The system of claim 18 , wherein entering the low power mode comprises using clock gating or electronically decoupling at least one component of the host subsystem from a main power source of the system, or some combination thereof.
20. A method for manufacturing an electronic device comprising: providing a main bus and a first plurality of components comprising a host processor, a memory controller, and a memory device; coupling the first plurality of components to the main bus to form a host subsystem; providing an audio bus, a subsystem interface, and a second plurality of components comprising a digital signal processor and an audio output device; coupling the second plurality of components and the subsystem interface to the audio bus to form an audio processing subsystem separate from the host subsystem, wherein the subsystem interface is configured to loosely couple the audio processing subsystem to the main bus of the host subsystem, such that the second plurality of components are inaccessible by the host processor and the second plurality of components are unable to access the main bus of the host subsystem; wherein the host processor is configured to issue an instruction to the memory controller to cause a segment of audio data stored in the memory device to be provided to the main bus, wherein the subsystem interface is configured to transfer the audio data from the main bus to the audio bus, and wherein the digital signal processor is configured to process the audio data received via the audio bus and to route the audio data to the audio output device.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
August 4, 2008
October 18, 2011
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