A method for manufacturing a semiconductor device includes forming a silicon substrate having first and second surfaces, the silicon substrate including no oxide film or an oxide film having a thickness no greater than 100 nm, forming a first oxide film at least on the second surface of the silicon substrate, forming a first film by covering at least the first surface, forming a mask pattern on the first surface by patterning the first film, forming a device separating region on the first surface by using the mask pattern as a mask, forming a gate insulating film on the first surface, forming a gate electrode on the first surface via the gate insulating film, forming a source and a drain one on each side of the gate electrode, and forming a wiring layer on the silicon substrate while maintaining the first oxide film on the second surface.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for manufacturing a semiconductor device, comprising: forming a silicon substrate having first and second surfaces, the silicon substrate including no oxide film or an oxide film having a thickness no greater than 100 nm; forming a first oxide film at least on the second surface of the silicon substrate; after forming the first oxide film, forming a first film by covering at least the first surface; forming a mask pattern on the first surface by patterning the first film; forming a device separating region on the first surface by using the mask pattern as a mask; after forming the device separating region, forming a gate insulating film on the first surface; forming a gate electrode on the gate insulating film; forming a source and a drain one on each side of the gate electrode; and forming a wiring layer on the silicon substrate while maintaining the first oxide film on the second surface.
2. The method as claimed in claim 1 , wherein forming the gate insulating film is performed by placing a plurality of the silicon substrates in a vertical furnace and thermally processing the plural silicon substrates.
3. The method as claimed in claim 2 , wherein the plurality of the silicon substrates are each placed in the vertical furnace in a horizontal state and are stacked at intervals in a vertical direction.
4. The method as claimed in claim 2 , wherein forming the gate insulating film is performed while oxygen gas is supplied at a flow rate of 10-20 sccm into the vertical furnace of 750-950° C.
5. The method as claimed in claim 1 , further comprising: forming the device separating region includes forming a device separating groove on the first surface by using the mask pattern; depositing a silicon oxide film on the first surface; and removing the silicon oxide film except at an area of the first surface where the device separating groove is formed; wherein the silicon oxide film is removed by using a chemical mechanical polishing process and a HydroFluoric (HF) process.
6. The method as claimed in claim 1 , further comprising: after forming the gate electrode, forming a side wall film on the gate electrode by forming a second film on the first and second surfaces in a manner covering at least a side wall of the gate electrode and etching back a part of the second film covering the front surface, and removing the second film formed on the second surface.
7. The method as claimed in claim 1 , wherein the first film is either a single layer film including any one of a poly-silicon film, a silicon oxide film, a silicon nitride film, an amorphous silicon film, and a silicon oxynitride film, or a multilayer film including two or more of the poly-silicon film, the silicon oxide film, the silicon nitride film, the amorphous silicon film, and the silicon oxynitride film.
8. The method as claimed in claim 1 , further comprising: after forming the first film, forming a second oxide film on the first and second surfaces, and removing the second oxide film formed on the first surface.
9. The method as claimed in claim 8 , wherein the first film is a poly-ilicon film.
10. The method as claimed in claim 1 , wherein the first oxide film is a silicon oxide film.
11. The method as claimed in claim 1 , wherein the first oxide film has a thickness no less than 200 nm.
12. The method as claimed in claim 1 , wherein forming the wiring layer includes forming a Cu wiring layer.
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May 19, 2009
October 25, 2011
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