Electronic apparatus and systems include structures having a dielectric layer containing a zirconium silicon oxide film. A zirconium silicon oxide film may be disposed in an integrated circuit, as well as in a variety of other electronic devices. Additional apparatus, systems, and methods are disclosed.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An electronic device comprising: a dielectric layer in an integrated circuit on a substrate, the dielectric layer including a nanolaminate having a zirconium silicon oxide film and having an additional zirconium silicon oxide film, the zirconium silicon oxide film structured as one or more monolayers, wherein the zirconium silicon oxide film is zirconium-rich relative to silicon content and the additional zirconium silicon oxide film is silicon-rich relative to zirconium content.
2. The electronic device of claim 1 , wherein the zirconium silicon oxide film comprises a zirconium oxide—silicon oxide mixture.
3. The electronic device of claim 1 , wherein the zirconium silicon oxide film comprises a zirconium silicate.
4. The electronic device of claim 1 , wherein the electronic device comprises a capacitor having the dielectric layer forming at least as portion of a capacitor dielectric.
5. The electronic device of claim 1 , wherein the electronic device comprises a transistor in which the dielectric layer is disposed.
6. The electronic device of claim 1 , wherein the electronic device comprises a memory having a transistor in which the dielectric layer is disposed.
7. The electronic device of claim 1 , wherein the electronic device comprises connections to couple a signal from other components in an electronic system to a conductive layer contacting the dielectric layer.
8. An electronic device comprising: a first conductive layer in an integrated circuit on a substrate; dielectric layer structured as a nanolaminate having an amorphous zirconium silicon oxide film and having an additional zirconium silicon oxide film, the nanolaminate disposed on the first conductive layer, the amorphous zirconium silicon oxide film structured as one or more monolayers, wherein the zirconium silicon oxide film is zirconium-rich relative to silicon content and the additional zirconium silicon oxide film is silicon-rich relative to zirconium content; and a second conductive layer on the amorphous zirconium silicon oxide film.
9. The electronic device of claim 8 , wherein the amorphous zirconium silicon oxide film comprises an amorphous zirconium silicate film.
10. The electronic device of claim 8 , wherein the electronic device comprises a memory in which the first conductive layer, the amorphous zirconium silicon oxide film, and the second conductive layer are disposed.
11. The electronic device of claim 8 , wherein the integrated circuit comprises a radio frequency integrated circuit.
12. An electronic device comprising: a transistor in an integrated circuit on a substrate, the transistor including: a source region and a drain region, the source region and the drain region separated by a body region; a dielectric layer disposed above the body region, the dielectric layer including a nanolaminate having a zirconium silicon oxide film and having an additional zirconium silicon oxide film, the zirconium silicon oxide film structured as one or more monolayers, wherein the zirconium silicon oxide film is zirconium-rich relative to silicon content and the additional zirconium silicon oxide film is silicon-rich relative to zirconium content; and a gate disposed on the dielectric layer.
13. The electronic device of claim 12 , wherein the dielectric layer comprises a dielectric metal oxide.
14. The electronic device of claim 12 , wherein the gate comprises a floating gate with the dielectric layer formed as a tunnel gate insulator.
15. The electronic device of claim 12 , wherein the gate comprises a control gate.
16. An electronic device comprising: a memory device on a substrate; and a dielectric layer in an integrated circuit of the memory device, the dielectric layer including a nanolaminate having a zirconium silicon oxide film and having an additional zirconium silicon oxide film, the zirconium silicon oxide film structured as one or more monolayers, wherein the zirconium silicon oxide film is zirconium-rich relative to silicon content and the additional zirconium silicon oxide film is silicon-rich relative to zirconium content.
17. The electronic device of claim 16 , wherein the zirconium silicon oxide comprises an amorphous zirconium silicate.
18. The electronic device of claim 16 , wherein the dielectric layer is arranged in a non-volatile read only memory device, the dielectric layer comprising a silicon oxide layer to store charge.
19. The electronic device of claim 16 , wherein the nanolaminate includes a layer of ZrO x , x>0.
20. The electronic device of claim 16 , wherein the dielectric layer is formed as a dielectric layer disposed as a tunnel gate insulator in a transistor in the memory device.
21. The electronic device of claim 16 , wherein the dielectric layer is structured essentially as the zirconium silicon oxide film.
22. A system comprising: a controller; a bus; an electronic device coupled to the controller by the bus; and a dielectric layer in an integrated circuit on a substrate, the dielectric layer disposed in the controller or in the electronic device, the dielectric layer including a nanolaminate having a zirconium silicon oxide film and having an additional zirconium silicon oxide film, the zirconium silicon oxide film structured as one or more monolayers, wherein the zirconium silicon oxide film is zirconium-rich relative to silicon content and the additional zirconium silicon oxide film is silicon-rich relative to zirconium content.
23. The system of claim 22 , wherein the dielectric layer comprises one or more dielectric metal oxides in addition to the zirconium silicon oxide film.
24. The system of claim 22 , wherein the zirconium silicon oxide film comprises a zirconium oxide—silicon oxide mixture.
25. The system of claim 22 , wherein the system comprises a wireless system.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
May 20, 2008
December 27, 2011
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