Energy source isolation and protection circuit for an electronic device

1. A battery isolation and protection circuit for an electronic device, the circuit comprising: a supply voltage rail; a reference voltage rail; an electrical load directly connected between the supply voltage rail and the reference voltage rail; a rechargeable battery having a positive terminal and a negative terminal directly connected to the reference voltage rail; a voltage comparator having a first input directly connected to the supply voltage rail, a second input directly connected to the reference voltage rail, and an output, the voltage comparator being configured to generate a relatively high voltage at the output when a voltage across the first input and the second input is greater than a threshold voltage, and to otherwise generate a relatively low voltage at the output; an NMOS transistor having a gate node directly connected to the output of the voltage comparator, a source node directly connected to the reference voltage rail, and a drain node; a pull-down resistor directly connected between the gate node of the NMOS transistor and the source node of the NMOS transistor, and directly connected between the output of the voltage comparator and the reference voltage rail; a PMOS transistor having a gate node directly connected to the drain node of the NMOS transistor, a drain node directly connected to the supply voltage rail, and a source node directly connected to the positive terminal of the rechargeable battery; and a pull-up resistor directly connected between the gate node of the PMOS transistor and the source node of the PMOS transistor, and directly connected between the drain node of the NMOS transistor and the positive terminal of the rechargeable battery; wherein the relatively high voltage at the output of the voltage comparator activates the NMOS transistor to place the drain node of the NMOS transistor and the gate node of the PMOS transistor at ground potential, and to activate the PMOS transistor to connect the rechargeable battery between the supply voltage rail and the reference voltage rail; and wherein the relatively low voltage at the output of the voltage comparator deactivates the NMOS transistor to establish an open circuit condition at the drain node of the NMOS transistor, and to deactivate the PMOS transistor to electrically isolate the rechargeable battery from the electrical load.

2. The circuit of claim 1 , wherein the rechargeable battery is a rechargeable lithium ion battery.

3. The circuit of claim 1 , wherein the rechargeable battery is a rechargeable lithium polymer battery.

4. The circuit of claim 1 , wherein the electronic device has a normal operating mode during which a voltage across the positive terminal and the negative terminal of the rechargeable battery is greater than the threshold voltage, the voltage comparator generates the relatively high voltage at the output, the NMOS transistor is switched on, and the PMOS transistor is switched on.

5. The circuit of claim 4 , wherein the electronic device has a detached mode during which the NMOS transistor is switched off, the PMOS transistor is switched off, and the rechargeable battery is electrically isolated.

6. The circuit of claim 5 , wherein the electronic device transitions from the normal operating mode to the detached mode in response to the voltage across the first input and the second input of the voltage comparator falling below the threshold voltage.

7. The circuit of claim 6 , wherein the electronic device remains in the detached mode until an external stimulus initiates switching on of the PMOS transistor.

8. The circuit of claim 7 , wherein the external stimulus is associated with the coupling of an external charger between the supply voltage rail and the reference voltage rail.