Data driver and liquid crystal display using the same

1. A data driver, comprising: a shift register that generates sampling signals using a shift clock and a start pulse; a latch that sequentially samples data signals, received from the outside, in response to the sampling signals; a gamma voltage generator that generates red, green, and blue positive gamma voltages and red, green, and blue negative gamma voltages and selectively outputs the red, green, and blue positive gamma voltages or the red, green, and blue negative gamma voltages according to a polarity control signal; and a digital to analog converter that converts the data signals received from the latch to positive analog video signals using the red, green, and blue positive gamma voltages from the gamma voltage generator if the gamma voltage generator applies the red, green, and blue positive gamma voltages or that converts the data signals received from the latch to negative analog video signals using the red, green, and blue negative gamma voltages from the gamma voltage generator if the gamma voltage generator applies the red, green, and blue negative gamma voltages, wherein the gamma voltage generator includes: a red gamma voltage generator generating the red positive gamma voltages and the red negative gamma voltages, and selectively outputting the red positive gamma voltages or red negative gamma voltages in response to the polarity control signal; a green gamma voltage generator generating the green positive gamma voltages and the green negative gamma voltages, and selectively outputting the green positive gamma voltages or green negative gamma voltages in response to the polarity control signal; and a blue gamma voltage generator generating the blue positive gamma voltages and the blue negative gamma voltages, and selectively outputting the blue positive gamma voltages or blue negative gamma voltages in response to the polarity control signal, wherein each of the red, green and blue gamma voltage generators includes: a single resistor set generating n divided voltages using a plurality of resistors, connected in series between first and second voltages; a single decoder that decodes the n divided voltages received from the single resistor set and generates m reference gamma voltages according to an adjustment signal; a positive gamma voltages generator that further divides the m reference gamma voltages received from the decoder and generates a plurality of positive gamma voltages corresponding to gray levels of the data signals; a negative gamma voltages generator that further divides the m reference gamma voltages received from the decoder and generates a plurality of negative gamma voltages corresponding to the gray levels of the data signals; and a multiplexer that selectively outputs the plurality of red positive gamma voltages or the plurality of red negative gamma voltages to the digital to analog converter in response to the polarity control signal, wherein the single decoder is directly connected with both the positive and negative gamma voltage generators and is directly connected with the single register set, wherein the single decoder is directly connected between an output terminal of the single register set and both input terminals of the positive and negative gamma voltage generators, wherein the single decoder applies the m reference gamma voltages, generated according to the adjustment signal, to the both the positive and negative gamma voltage generators, and wherein the polarity control signal is applied to all the three multiplexers of the red, green and blue gamma voltage generators.

2. A liquid crystal display, comprising: an image display unit that displays images by controlling light transmittance of liquid crystal cells provided in areas defined by gate and data lines crossing each other; a gate driver supplying scan pulses to the gate lines; a data driver supplying positive or negative analog video signals to the data lines; and a timing controller supplying data signals to the data driver and controls drive timings of the data driver and the gate driver, wherein the data driver includes: a shift register that generates sampling signals using a shift clock and a start pulse; a latch that sequentially samples the data signals, received from the timing controller, according to the sampling signals; an gamma voltage generator that generates red, green, and blue positive gamma voltages and red, green, and blue negative gamma voltages and selectively outputs the red, green, and blue positive gamma voltages or red, green, and blue negative gamma voltages according to a polarity control signal; and a digital to analog converter that converts the sampled data signals received from the latch to the positive analog video signals using the red, green, and blue positive gamma voltages from the gamma voltage generator if the gamma voltage generator applies the red, green, and blue positive gamma voltages or that converts the data signals received from the latch to negative analog video signals using the red, green, and the blue negative gamma voltages from the gamma voltage generator if the gamma voltage generator applies the red, green, and blue negative gamma voltages, wherein the gamma voltage generator includes: a red gamma voltage generator generating the red positive gamma voltages and the red negative gamma voltages, and selectively outputting the red positive gamma voltages or red negative gamma voltages in response to the polarity control signal; a green gamma voltage generator generating the green positive gamma voltages and the green negative gamma voltages, and selectively outputting the green positive gamma voltages or green negative gamma voltages in response to the polarity control signal; and a blue gamma voltage generator generating the blue positive gamma voltages and the blue negative gamma voltages, and selectively outputting the blue positive gamma voltages or blue negative gamma voltages in response to the polarity control signal, wherein each of the red, green and blue gamma voltage generators includes: a single resistor set generating n divided voltages using a plurality of resistors, connected in series between first and second voltages; a single decoder that decodes the n divided voltages received from the single resistor set and generates m reference gamma voltages according to an adjustment signal; a positive gamma voltages generator that further divides the m reference gamma voltages received from the decoder and generates a plurality of positive gamma voltages corresponding to gray levels of the data signals; a negative gamma voltages generator that further divides the m reference gamma voltages received from the decoder and generates a plurality of negative gamma voltages corresponding to the gray levels of the data signals; and a multiplexer that selectively outputs the plurality of red positive gamma voltages or the plurality of red negative gamma voltages to the digital to analog converter in response to the polarity control signal, wherein the single decoder is directly connected with both the positive and negative gamma voltage generators and is directly connected with the single register set, wherein the single decoder is directly connected between an output terminal of the single register set and both input terminals of the positive and negative gamma voltage generators, wherein the single decoder applies the m reference gamma voltages, generated according to the adjustment signal, to the both the positive and negative gamma voltage generators, and wherein the polarity control signal is applied to all the three multiplexers of the red, green and blue gamma voltage generators.