The present invention relates to electrostatic discharge (ESD) protection circuitry. Multiple techniques are presented to adjust one or more ends of one or more fingers of an ESD protection device so that the ends of the fingers have a reduced initial trigger or breakdown voltage as compared to other portions of the fingers, and in particular to central portions of the fingers. In this manner, most, if not all, of the adjusted ends of the fingers are likely to trigger or fire before any of the respective fingers completely enters a snapback region and begins to conduct ESD current. Consequently, the ESD current is more likely to be distributed among all or substantially all of the plurality of fingers rather than be concentrated within one or merely a few fingers. As a result, potential harm to the ESD protection device (e.g., from current crowding) is mitigated and the effectiveness of the device is improved.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of forming an integrated circuit including an ESD protection device, comprising: forming a plurality of source regions, drain regions and gates in or on generally elongate parallel finger regions of a semiconductor substrate defined within a moat region surrounded by an insulating barrier on the substrate; the gates comprising dielectric material overlying channel regions within the substrate between respective ones of the source and drain regions, and conductive material overlying the dielectric material; wherein the semiconductor substrate is doped to have a net one of an N or P conductivity type; the source and drain regions are doped to have a net other of the N or P conductivity type; and at least a portion of a respective end region of one or more of the substrate finger regions is doped to provide a higher net doping of the one of the N or P conductivity type than a corresponding net doping of a corresponding respective middle region of the same one or more finger regions, so that the end region with the higher net doping is provided with an initial trigger voltage that is lower than a trigger voltage at the corresponding middle region; wherein the semiconductor substrate is provided with an initial doping of the one of the N or P conductivity type; and forming the plurality of source regions, drain regions and gates includes providing a supplemental doping of the one of the N or P conductivity type at the portion of the end region; and wherein the supplemental doping is provided prior to formation of the gates.
2. The method of claim 1 , wherein the supplemental doping covers only a fractional portion of the drain region of the respective end region.
3. The method of claim 1 , wherein the supplemental doping is applied to at least a portion of respective end regions of both ends of the one or more of the substrate finger regions.
4. A method of forming a multi-finger MOS ESD protection device, comprising: providing a moat region of first conductivity type laterally surrounded by an insulating barrier in a substrate; forming a plurality of generally parallel elongated gates at spaced positions extending over the moat region; doping the moat region with dopant of second conductivity type to form generally parallel elongated source and drain regions of second conductivity type on opposite sides of the gates, separated by channel regions of the moat region of first conductivity type defined under the gates between the source and drain regions; and prior to forming the gates, supplementally doping the moat region at end regions of the channel regions, thereby providing greater doping concentration of the first conductivity type at the end regions than in other regions of the channel regions.
5. The method of claim 4 , wherein supplementally doping the moat region also includes supplementally doping at least portions of end regions of the drain regions, thereby providing greater doping concentration of the first conductivity type at the supplementally doped portions of the end regions of the drain regions than in other regions of the drain regions.
6. The method of claim 5 , wherein supplementally doping the moat region also includes supplementally doping at least portions of end regions of the source regions, thereby providing greater doping concentration of the first conductivity type at the supplementally doped portions of the end regions of the source regions than in other regions of the source regions.
7. The method of forming a multi-finger MOS ESD protection device, comprising: providing a moat region of first conductivity type laterally surrounded by an insulating barrier in a substrate; forming a plurality of generally parallel elongated gates at spaced positions extending over the moat region; doping the moat region with dopant of second conductivity type to form generally parallel elongated source and drain regions of second conductivity type on opposite sides of the gates, separated by channel regions of the moat region of first conductivity type defined under the gates between the source and drain regions; and supplementally doping the moat region across the full channel length of end regions at least one end of the channel regions, thereby providing greater doping concentration of the first conductivity type at the supplementally doped end regions of the channel regions than in other regions of the channel regions; wherein supplementally doping the moat region also includes supplementally doping at least portions of end regions of the drain regions, thereby providing greater doping concentration of the first conductivity type at the supplementally doped portions of the end regions of the drain regions than in other regions of the drain regions.
8. The method of claim 7 , wherein supplementally doping the moat region also includes supplementally doping at least portions of end regions of the source regions, thereby providing greater doping concentration of the first conductivity type at the supplementally doped portions of the end regions of the source regions than in other regions of the source regions.
9. A method of forming a multi-finger MOS ESD protection device, comprising: providing a moat region of first conductivity type laterally surrounded by an insulating barrier in a substrate; forming a plurality of generally parallel elongated gates at spaced positions extending over the moat regions; doping the moat regions with dopant of second conductivity type to form generally parallel elongated source and drain regions of second conductivity type on opposite sides of the gates, separated by channel regions of the moat region of first conductivity type defined under the gates between the source and drain regions; and supplementally doping the moat regions at end regions at least one end of the first conductivity type channel regions and at end regions at least one end of the second conductivity type drain regions, thereby providing greater doping concentration of the first conductivity type at the supplementally doped end regions of the first conductivity type channel regions than in other regions of the channel regions and at the supplementally doped end regions of the drain regions than in other regions of the drain regions.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 16, 2006
February 7, 2012
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.