Patentable/Patents/US-8117614
US-8117614

Extract CPU time facility

PublishedFebruary 14, 2012
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

An efficient facility for determining resource usage, such as a processor time used by tasks. The determination is performed on behalf of user applications that do not require a call to operating system services. The facility includes an instruction that determines elapsed time and reports it to the user as a single unit of operation.

Patent Claims
21 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method for executing an EXTRACT CPU TIME machine instruction in a computer system that includes a set of 16 instruction accessible registers and a CPU timer, the method comprising: switching to a non-privileged state for executing non-privileged instructions; obtaining for execution the EXTRACT CPU TIME machine instruction defined for an architecture, the EXTRACT CPU TIME instruction comprising an opcode field identifying the instruction, a first base field (B 1 ) for identifying a first register, a first displacement field (D 1 ), a second base field (B 2 ) for identifying a second register, a second displacement field (D 2 ), and a register field identifying a third register; and executing the obtained EXTRACT CPU TIME machine instruction atomically in the non-privileged state to obtain information relating to a task executing within the computing system, a portion of the information used to determine resource time usage of the task, the executing comprising: determining a current value of a CPU timer which decrements as the task executes, the current value of the CPU timer indicating an amount of time that remains in a specified amount of time allocated for execution of the task; adding content of the first register and a value of the first displacement field to form an address of a first operand in storage; based on the formed address of the first operand, fetching the first operand from storage, the first operand representing a value of the CPU timer at a defined time; subtracting the determined current value of the CPU timer from the fetched first operand to produce a first result, the first result indicating elapsed CPU time for the task for a given time period; storing the first result in a fourth register; adding content of the second register and a value of the second displacement field to form an address of a second operand; based on the formed address of the second operand, fetching the second operand from storage, the second operand used to provide a previously used amount of total CPU time for the task; storing the second operand in a fifth register; using contents of the third register fetching a third operand from storage, the third operand used to provide selected information relating to the task; and storing the fetched third operand in the third register, wherein total CPU time used thus far by the task can be determined by adding the result stored in the fourth register to the previously used amount of total CPU time stored in the fifth register.

2

2. The method according to claim 1 , wherein the fourth register is defined by the architecture to be register 0 of registers 0-15, and the fifth register is defined by the architecture to be register 1 of registers 0-15.

3

3. The method of claim 2 , further comprising: obtaining a privileged set CPU timer machine instruction to be executed, the set CPU timer machine instruction having an operand field that at least partially identifies an address of a first memory location that stores a new timer value; executing the privileged set CPU timer machine instruction comprising setting the CPU timer to the new timer value, where the CPU timer is configured to cause an interrupt if a threshold value is reached; obtaining a privileged store CPU time machine instruction; and executing the privileged store CPU time machine instruction comprising obtaining a CPU timer value from the CPU timer and storing the obtained CPU timer value in a second memory location, wherein the second memory location contains the first operand in storage.

4

4. The method of claim 1 , further comprising: prior to obtaining for execution the EXTRACT CPU TIME machine instruction, the CPU timer is set to a value that represents the specified amount of time allocated for execution of the task by the computer system.

5

5. The method of claim 4 , wherein the first operand represents an amount of time allocated for execution of the task at a time that the task is dispatched.

6

6. The method of claim 4 , wherein the second operand represents an amount of resource time used for the task prior to the current value of the CPU timer.

7

7. The method of claim 4 , wherein the fetched third operand contains information used to adjust CPU time for billing a user for an amount of CPU time used for the task.

8

8. The method of claim 1 , wherein the method is performed on a processing unit of a different architecture that is emulating the execution of the EXTRACT CPU TIME machine instruction.

9

9. The method of claim 1 , wherein the determining occurs subsequent to starting the task and prior to an end of the specified amount of time allocated for execution of the task.

10

10. A computer system for executing an EXTRACT CPU TIME machine instruction, the computer system including a set of 16 instruction accessible registers and a CPU timer, and wherein the computer system comprises: a memory; and a processor in communications with the memory, wherein the computer system is configured to perform a method, the method comprising: switching to a non-privileged state for executing non-privileged instructions; obtaining for execution the EXTRACT CPU TIME machine instruction defined for an architecture, the EXTRACT CPU TIME instruction comprising an opcode field identifying the instruction, a first base field (B 1 ) for identifying a first register, a first displacement field (D 1 ), a second base field (B 2 ) for identifying a second register, a second displacement field (D 2 ), and a register field identifying a third register; and executing the obtained EXTRACT CPU TIME machine instruction atomically in the non-privileged state to obtain information relating to a task executing within the computing system, a portion of the information used to determine resource time usage of the task, the executing comprising: determining a current value of a CPU timer which decrements as the task executes, the current value of the CPU timer indicating an amount of time that remains in a specified amount of time allocated for execution of the task; adding content of the first register and a value of the first displacement field to form an address of a first operand in storage; based on the formed address of the first operand, fetching the first operand from storage, the first operand representing a value of the CPU timer at a defined time; subtracting the determined current value of the CPU timer from the fetched first operand to produce a first result, the first result indicating elapsed CPU time for the task for a given time period; storing the first result in a fourth register; adding content of the second register and a value of the second displacement field to form an address of a second operand; based on the formed address of the second operand, fetching the second operand from storage, the second operand used to provide a previously used amount of total CPU time for the task; storing the second operand in a fifth register; using contents of the third register fetching a third operand from storage, the third operand used to provide selected information relating to the task; and storing the fetched third operand in the third register, wherein total CPU time used thus far by the task can be determined by adding the result stored in the fourth register to the previously used amount of total CPU time stored in the fifth register.

11

11. The computer system according to claim 10 , wherein the fourth register is defined by the architecture to be register 0 of registers 0 - 15 , and the fifth register is defined by the architecture to be register 1 of registers 0 - 15 .

12

12. The computer system of claim 10 , wherein the method further comprises: prior to obtaining for execution the EXTRACT CPU TIME machine instruction, the CPU timer is set to a value that represents the specified amount of time allocated for execution of the task by the computer system.

13

13. The computer system of claim 10 , wherein the processor emulates the execution of the EXTRACT CPU TIME machine instruction.

14

14. The computer system of claim 11 , wherein the method further comprises: obtaining a privileged set CPU timer machine instruction to be executed, the set CPU timer machine instruction having an operand field that at least partially identifies an address of a first memory location that stores a new timer value; executing the privileged set CPU timer machine instruction comprising setting the CPU timer to the new timer value, where the CPU timer is configured to cause an interrupt if a threshold value is reached; obtaining a privileged store CPU time machine instruction; and executing the privileged store CPI time machine instruction comprising obtaining a CPU timer value from the CPU timer and storing the obtained CPU timer value in a second memory location, wherein the second memory location contains the first operand in storage.

15

15. A computer program product for executing an EXTRACT CPU TIME machine instruction in a computer system that includes a set of 16 instruction accessible registers and a CPU timer, the computer program product comprising: a non-transitory storage medium readable by a processor and storing instructions for execution by the processor for performing a method comprising: switching to a non-privileged state for executing non-privileged instructions; obtaining for execution the EXTRACT CPU TIME machine instruction defined for an architecture, the EXTRACT CPU TIME instruction comprising an opcode field identifying the instruction, a first base field (B 1 ) for identifying a first register, a first displacement field (D 1 ), a second base field (B 2 ) for identifying a second register, a second displacement field (D 2 ), and a register field identifying a third register; and executing the obtained EXTRACT CPU TIME machine instruction atomically in the non-privileged state to obtain information relating to a task executing with the computing system, a portion of the information used to determine resource time usage of the task, the executing comprising: determining a current value of a CPU timer which decrements as the task executes, the current value of the CPU timer indicating an amount of time that remains in a specified amount of time allocated for execution of the task; adding content of the first register and a value of the first displacement field to form an address of a first operand in storage; based on the formed address of the first operand, fetching the first operand from storage, the first operand representing a value of the CPU timer at a defined time; subtracting the determined current value of the CPU timer from the fetched first operand to produce a first result, the first result indicating elapsed CPU time for the task for a given time period; storing the first result in a fourth register; adding content of the second register and a value of the second displacement field to form an address of a second operand; based on the formed address of the second operand, fetching the second operand from storage, the second operand used to provide a previously used amount of total CPU time for the task; storing the second operand in a fifth register; using contents of the third register fetching a third operand from storage, the third operand used to provide selected information relating to the task; and storing the fetched third operand in the third register, wherein total CPU time used thus far by the task can be determined by adding the result stored in the fourth register to the previously used amount of total CPU time stored in the fifth register.

16

16. The computer program product of claim 15 , wherein the method further includes: prior to obtaining for execution the EXTRACT CPU TIME machine instruction, the CPU timer is set to a value that represents the specified amount of time allocated for execution of the task by the computer system.

17

17. The computer program product of claim 16 , wherein the first operand represents an amount of time allocated for execution of the task at a time that the task is dispatched.

18

18. The computer program product of claim 16 , wherein the second operand represents an amount of resource time used for the task prior to the current value of the CPU timer.

19

19. The computer program product of claim 16 , wherein the fetched third operand contains information used to adjust CPU time for billing a user for an amount of CPU time used for the task.

20

20. The computer program product of claim 15 , wherein the method is performed on a processing unit of a different architecture that is emulating the execution of the EXTRACT CPU TIME machine instruction.

21

21. The computer program product of claim 15 , wherein the method further comprises: obtaining a privileged set CPU timer machine instruction to be executed, the set CPU timer machine instruction having an operand field that at least partially identifies an address of a first memory location that stores a new timer value; executing the privileged set CPU timer machine instruction comprising setting the CPU timer to the new timer value, where the CPU timer is configured to cause an interrupt if a threshold value is reached; obtaining a privileged store CPU time machine instruction; and executing the privileged store CPI time machine instruction comprising obtaining a CPU timer value from the CPU timer and storing the obtained CPU timer value in a second memory location, wherein the second memory location contains the first operand in storage.

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Patent Metadata

Filing Date

May 19, 2006

Publication Date

February 14, 2012

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Cite as: Patentable. “Extract CPU time facility” (US-8117614). https://patentable.app/patents/US-8117614

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