An output node at a plus side of a diode bridge (DB2) is connected to a drain of a transistor (Q1), and a source of the transistor (Q1) is connected to an output node at a minus side the diode bridge (DB2). One end of a resister (R1) is connected to the drain of the transistor (Q1), and the other end of the resister (R1) is connected to a gate of the transistor (Q1). One end of a resister (R2) is connected to the gate of the transistor (Q1), and the other end of the resister (R2) is connected to the source of the transistor (Q1). A capacitor (C1) is connected in parallel to the resister (R2).
Legal claims defining the scope of protection, as filed with the USPTO.
1. A rush current reduction circuit comprising: a diode bridge inserted into an AC circuit into which a load circuit is inserted; and a DC rush current reduction circuit inserted into a circuit through which current flows from the diode bridge, wherein the DC rush current reduction circuit comprises: a transistor inserted into a circuit through which current flows from the diode bridge; a capacitor connected to a bias control point of the transistor and charged by the current from the diode bridge to cause bias voltage which is voltage of the bias control point to increase; a resister connected in parallel to the capacitor; and a resistor inserted into a path for charging the capacitor.
2. A rush current reduction circuit comprising: a diode bridge inserted into an AC circuit when a load circuit is connected to subsequent stages of a diode bridge inserted into the AC circuit; and a DC rush current reduction circuit inserted into a circuit through which current flows from this diode bridge, wherein the DC rush current reduction circuit comprises: a transistor inserted into a circuit through which current flows from the diode bridge; a capacitor connected to a bias control point of the transistor and charged by the current from the diode bridge to cause bias voltage which is voltage of the bias control point to increase; a resister connected in parallel to the capacitor; and a resistor inserted into a path for charging the capacitor.
3. The rush current reduction circuit according to claim 2 , further comprising: a control circuit inserted between a first circuit node existing on subsequent stages of the diode bridge to which the load circuit is connected and a second circuit node existing on the DC rush current reduction circuit.
4. The rush current reduction circuit according to claim 3 , wherein the control circuit is provided with a diode for preventing reverse current toward the first circuit node.
5. An electric appliance comprising: a rush current reduction circuit described in any one of claims 1 to 4 ; and the load circuit.
6. The electric appliance according to claim 5 , wherein there is provided a drive unit to which electric power is supplied from an inverter to be the load circuit.
7. The electric appliance according to claim 5 , wherein there is provided a light source to which electric power is supplied from an inverter to be the load circuit.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 19, 2006
February 21, 2012
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